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[PULL 11/21] hw/arm/sbsa-ref: Force CPU generic timer to 62.5MHz
From: |
Peter Maydell |
Subject: |
[PULL 11/21] hw/arm/sbsa-ref: Force CPU generic timer to 62.5MHz |
Date: |
Tue, 30 Apr 2024 17:48:32 +0100 |
Currently QEMU CPUs always run with a generic timer counter frequency
of 62.5MHz, but ARMv8.6 CPUs will run at 1GHz. For older versions of
the TF-A firmware that sbsa-ref runs, the frequency of the generic
timer is hardcoded into the firmware, and so if the CPU actually has
a different frequency then timers in the guest will be set
incorrectly.
The default frequency used by the 'max' CPU is about to change, so
make the sbsa-ref board force the CPU frequency to the value which
the firmware expects.
Newer versions of TF-A will read the frequency from the CPU's
CNTFRQ_EL0 register:
https://github.com/ARM-software/arm-trusted-firmware/commit/4c77fac98dac0bebc63798aae9101ac865b87148
so in the longer term we could make this board use the 1GHz
frequency. We will need to make sure we update the binaries used
by our avocado test
Aarch64SbsarefMachine.test_sbsaref_alpine_linux_max_pauth_impdef
before we can do that.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org>
Message-id: 20240426122913.3427983-3-peter.maydell@linaro.org
---
hw/arm/sbsa-ref.c | 15 +++++++++++++++
1 file changed, 15 insertions(+)
diff --git a/hw/arm/sbsa-ref.c b/hw/arm/sbsa-ref.c
index f5709d6c141..36f6f717b4b 100644
--- a/hw/arm/sbsa-ref.c
+++ b/hw/arm/sbsa-ref.c
@@ -60,6 +60,19 @@
#define NUM_SMMU_IRQS 4
#define NUM_SATA_PORTS 6
+/*
+ * Generic timer frequency in Hz (which drives both the CPU generic timers
+ * and the SBSA watchdog-timer). Older versions of the TF-A firmware
+ * typically used with sbsa-ref (including the binaries in our Avocado test
+ * Aarch64SbsarefMachine.test_sbsaref_alpine_linux_max_pauth_impdef
+ * assume it is this value.
+ *
+ * TODO: this value is not architecturally correct for an Armv8.6 or
+ * better CPU, so we should move to 1GHz once the TF-A fix above has
+ * made it into a release and into our Avocado test.
+ */
+#define SBSA_GTIMER_HZ 62500000
+
enum {
SBSA_FLASH,
SBSA_MEM,
@@ -767,6 +780,8 @@ static void sbsa_ref_init(MachineState *machine)
&error_abort);
}
+ object_property_set_int(cpuobj, "cntfrq", SBSA_GTIMER_HZ,
&error_abort);
+
object_property_set_link(cpuobj, "memory", OBJECT(sysmem),
&error_abort);
--
2.34.1
- [PULL 00/21] target-arm queue, Peter Maydell, 2024/04/30
- [PULL 02/21] hvf: arm: Remove PL1_WRITE_MASK, Peter Maydell, 2024/04/30
- [PULL 03/21] target/arm: Restrict translation disabled alignment check to VMSA, Peter Maydell, 2024/04/30
- [PULL 06/21] target/arm: Enable FEAT_ETS2 for -cpu max, Peter Maydell, 2024/04/30
- [PULL 08/21] target/arm: Enable FEAT_Spec_FPACC for -cpu max, Peter Maydell, 2024/04/30
- [PULL 05/21] target/arm: Enable FEAT_CSV2_3 for -cpu max, Peter Maydell, 2024/04/30
- [PULL 01/21] hw/core/clock: allow clock_propagate on child clocks, Peter Maydell, 2024/04/30
- [PULL 04/21] docs/system/arm/emulation.rst: Add missing implemented features, Peter Maydell, 2024/04/30
- [PULL 09/21] tests/avocado: update sunxi kernel from armbian to 6.6.16, Peter Maydell, 2024/04/30
- [PULL 11/21] hw/arm/sbsa-ref: Force CPU generic timer to 62.5MHz,
Peter Maydell <=
- [PULL 12/21] hw/watchdog/sbsa_gwdt: Make watchdog timer frequency a QOM property, Peter Maydell, 2024/04/30
- [PULL 10/21] target/arm: Refactor default generic timer frequency handling, Peter Maydell, 2024/04/30
- [PULL 07/21] target/arm: Implement ID_AA64MMFR3_EL1, Peter Maydell, 2024/04/30
- [PULL 16/21] hw/arm/npcm7xx: Store derivative OTP fuse key in little endian, Peter Maydell, 2024/04/30
- [PULL 18/21] hw/arm : Pass STM32L4x5 SYSCFG gpios to STM32L4x5 SoC, Peter Maydell, 2024/04/30
- [PULL 19/21] hw/arm : Create Bl475eMachineState, Peter Maydell, 2024/04/30
- [PULL 14/21] hw/dmax/xlnx_dpdma: fix handling of address_extension descriptor fields, Peter Maydell, 2024/04/30
- [PULL 13/21] target/arm: Default to 1GHz cntfrq for 'max' and new CPUs, Peter Maydell, 2024/04/30
- [PULL 20/21] hw/arm : Connect DM163 to B-L475E-IOT01A, Peter Maydell, 2024/04/30
- [PULL 17/21] hw/display : Add device DM163, Peter Maydell, 2024/04/30