I know why it failed ( I forgot to add internal SRAM to qemu
emulation, so TLB was nowhere).
Valid question is that how can I easily debug such problems in qemu?
GDB backed seem to have problem with debugging low level cpu
initialization?
Is there any other way or documentation how to do it?
W dniu 27.06.2015 o 14:19,
mar.krzeminski pisze:
Hi all,
It is my first post here, and first question.
I am creating new hw board wirt cortex a-9 CPU.
I have code in my SPL:
asm volatile ("mrc p15, 0, %0, c1, c0, 0" : "=r" (a) : );
// Read SCTLR
a = a | (1 << 2) | (1 << 0);
asm volatile ("mcr p15, 0, %0, c1, c0, 0" : :
"r" (a)); // Write SCTLR
After writing to SCTLR cpu seems to hangs. On real hardware this
code works.
My question is how can I debug what is wrong in here?
Regards,
Marcin
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