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Re: [Qemu-discuss] ppc and icount


From: Peter Maydell
Subject: Re: [Qemu-discuss] ppc and icount
Date: Tue, 9 Jan 2018 22:29:07 +0000

On 9 January 2018 at 20:41, Steven Seeger
<address@hidden> wrote:
> I am working with a custom model powerpc board (750-based) and I am having an
> issue with icount (any shift value).
>
> First, upon the first execution of the rfi instruction, I get:
>
> qemu: fatal: Raised interrupt while not in I/O function
> NIP 00030354   LR 00000000 CTR 00000000 XER 00000000 CPU#0
> MSR 00001000 HID0 0000c484  HF 00000000 iidx 3 didx 3
> Bad icount read
>
> However, the interrupt controller is one I created and there is certainly no
> assertion of the CPU's external interrupt line.

The abort cares about all kinds of CPU interrupts (which includes
some kinds of internal things). These are not supposed to happen
unexpectedly when in icount mode. If you run under gdb you can
get a backtrace of what it was that caused the call that made
this assert fire. That will help in figuring out what's happened.

You should also check whether icount mode works with upstream
QEMU's standard powerpc boards -- if so, then that suggests
your local changes are the issue; if not, then the problem is
with upstream QEMU, and we can look at fixing it if you have
a reproducer that works with an unmodified QEMU.

thanks
-- PMM



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