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[Qemu-ppc] [PATCH 09/16] PPC: Add PIR register to POWER7 CPU


From: Alexander Graf
Subject: [Qemu-ppc] [PATCH 09/16] PPC: Add PIR register to POWER7 CPU
Date: Thu, 15 Mar 2012 13:14:15 +0100

From: Nathan Whitehorn <address@hidden>

The POWER7 emulation is missing the Processor Identification Register,
mandatory in recent POWER CPUs, that is required for SMP on at least
some operating systems (e.g. FreeBSD) to function properly. This patch
copies the existing PIR code from the other CPUs that implement it.

Signed-off-by: Nathan Whitehorn <address@hidden>
Signed-off-by: Alexander Graf <address@hidden>
---
 target-ppc/translate_init.c |    5 +++++
 1 files changed, 5 insertions(+), 0 deletions(-)

diff --git a/target-ppc/translate_init.c b/target-ppc/translate_init.c
index c707959..5a958b9 100644
--- a/target-ppc/translate_init.c
+++ b/target-ppc/translate_init.c
@@ -6588,6 +6588,11 @@ static void init_proc_POWER7 (CPUPPCState *env)
     gen_spr_7xx(env);
     /* Time base */
     gen_tbl(env);
+    /* Processor identification */
+    spr_register(env, SPR_PIR, "PIR",
+                 SPR_NOACCESS, SPR_NOACCESS,
+                 &spr_read_generic, &spr_write_pir,
+                 0x00000000);
 #if !defined(CONFIG_USER_ONLY)
     /* PURR & SPURR: Hack - treat these as aliases for the TB for now */
     spr_register(env, SPR_PURR,   "PURR",
-- 
1.6.0.2




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