[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
Re: [Qemu-ppc] [PULL 1/3] ppc: Rework POWER7 & POWER8 exception model
From: |
Cédric Le Goater |
Subject: |
Re: [Qemu-ppc] [PULL 1/3] ppc: Rework POWER7 & POWER8 exception model |
Date: |
Tue, 5 Apr 2016 09:03:25 +0200 |
User-agent: |
Mozilla/5.0 (X11; Linux x86_64; rv:38.0) Gecko/20100101 Icedove/38.7.0 |
On 04/05/2016 05:25 AM, David Gibson wrote:
> On Tue, Apr 05, 2016 at 12:19:50PM +1000, Benjamin Herrenschmidt wrote:
>> On Tue, 2016-04-05 at 12:17 +1000, David Gibson wrote:
>>> From: Cédric Le Goater <address@hidden>
>>>
>>> From: Benjamin Herrenschmidt <address@hidden>
>>>
>>> This patch fixes the current AIL implementation for POWER8. The
>>> interrupt vector address can be calculated directly from LPCR when
>>> the
>>> exception is handled. The excp_prefix update becomes useless and we
>>> can cleanup the H_SET_MODE hcall.
>>
>> Beware, iirc, this depends on the new cpu_set_papr() stuff I did so we
>> get the right LPCR values in PAPR mode.
>
> Right, Cédric already submitted that before the 2.6 freeze, and it was
> merged as 26a7f129, AFAICT.
Well, yes, but cpu_ppc_set_papr() only handles the AMOR setting, the LPCR
settings were kept for later as they were not bug fixes.
As for now, powerpc_excp() checks the ILE bit and uses the AIL bits to
calculate the vector address, which was done before in the H_SET_MODE
hcall. This allows some simplification, getting rid of excp_prefix,
and fixes a migration bug in TCG.
C.
[Qemu-ppc] [PULL 2/3] spapr_drc: enable immediate detach for unsignalled devices, David Gibson, 2016/04/04
[Qemu-ppc] [PULL 3/3] vl: Move cpu_synchronize_all_states() into qemu_system_reset(), David Gibson, 2016/04/04
Re: [Qemu-ppc] [PULL 0/3] ppc-for-2.6 queue 20160405, Peter Maydell, 2016/04/05