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Re: [Qemu-ppc] [PATCH v1 1/5] target-ppc: add vector insert instructions
From: |
David Gibson |
Subject: |
Re: [Qemu-ppc] [PATCH v1 1/5] target-ppc: add vector insert instructions |
Date: |
Tue, 9 Aug 2016 13:18:11 +1000 |
User-agent: |
Mutt/1.6.2 (2016-07-01) |
On Thu, Aug 04, 2016 at 10:08:17PM +0530, Richard Henderson wrote:
> On 08/04/2016 06:33 PM, Rajalakshmi Srinivasaraghavan wrote:
> > +#if defined(HOST_WORDS_BIGENDIAN)
> > +#define VINSERT(suffix, element, index)
> > \
> > + void helper_vinsert##suffix(ppc_avr_t *r, ppc_avr_t *b, uint32_t
> > splat) \
> > + {
> > \
> > + memcpy(&r->u8[SPLAT_ELEMENT(u8)], &b->element[index],
> > \
It seems odd to use SPLAT_ELEMENT() here but not in the LE case, given
that SPLAT_ELEMENT() is already a macro whose definition is
conditional on endianness. It might actually be clearer to open code it.
> > + sizeof(r->element[0]));
> > \
> > + }
> > +#else
> > +#define VINSERT(suffix, element, index)
> > \
> > + void helper_vinsert##suffix(ppc_avr_t *r, ppc_avr_t *b, uint32_t
> > splat) \
> > + {
> > \
> > + memcpy(&r->u8[(16 - splat) - sizeof(r->element[0])],
> > \
> > + &b->element[(ARRAY_SIZE(r->element) - index) - 1],
> > \
> > + sizeof(r->element[0]));
> > \
> > + }
>
> Something somewhere needs to check for out of bounds SPLAT, for evil guests.
>
> The spec says it's undefined; I don't recall if that gives you the latitude
> to generate an illegal instruction trap during translate.
splat is an immediate argument, so that should be done on the
generator side, rather than the helper side. It's already partially
done by the way it's extracted from the instruction.
But, AFAICT that just limits splat to 5 bits, and I'm not sure that's
enough for all forms of this instruction.
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
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- [Qemu-ppc] [PATCH v1 0/5] POWER9 TCG enablement - part3, Rajalakshmi Srinivasaraghavan, 2016/08/04
- [Qemu-ppc] [PATCH v1 1/5] target-ppc: add vector insert instructions, Rajalakshmi Srinivasaraghavan, 2016/08/04
- [Qemu-ppc] [PATCH v1 2/5] target-ppc: add vector extract instructions, Rajalakshmi Srinivasaraghavan, 2016/08/04
- [Qemu-ppc] [PATCH v1 3/5] target-ppc: add vector count trailing zeros instructions, Rajalakshmi Srinivasaraghavan, 2016/08/04
- [Qemu-ppc] [PATCH v1 4/5] target-ppc: add vector bit permute doubleword instruction, Rajalakshmi Srinivasaraghavan, 2016/08/04
- [Qemu-ppc] [PATCH v1 5/5] target-ppc: add vector permute right indexed instruction, Rajalakshmi Srinivasaraghavan, 2016/08/04
- Re: [Qemu-ppc] [PATCH v1 0/5] POWER9 TCG enablement - part3, David Gibson, 2016/08/08