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[Qemu-ppc] [PULL 03/17] powernv: Don't test POWER9 CPU yet
From: |
David Gibson |
Subject: |
[Qemu-ppc] [PULL 03/17] powernv: Don't test POWER9 CPU yet |
Date: |
Fri, 3 Mar 2017 14:24:53 +1100 |
A couple of tests for the work-in-progress 'powernv' machine type attempt
to test on POWER9 CPUs. However the POWER9 CPU support is incomplete and
this doesn't really work. In particular the firmware image we have
currently assumes the presence of the SDR1 register, which no longer exists
on POWER9. We only got away with this so far, because of a different bug
which added SDR1 to POWER9 even though it shouldn't be there.
For now, remove POWER9 testing of powernv, POWER8 testing will do for now
until the POWER9 support is more complete.
Signed-off-by: David Gibson <address@hidden>
---
tests/boot-serial-test.c | 2 +-
tests/pnv-xscom-test.c | 5 ++++-
2 files changed, 5 insertions(+), 2 deletions(-)
diff --git a/tests/boot-serial-test.c b/tests/boot-serial-test.c
index 44c82e5..57edf6a 100644
--- a/tests/boot-serial-test.c
+++ b/tests/boot-serial-test.c
@@ -29,7 +29,7 @@ static testdef_t tests[] = {
{ "ppc64", "ppce500", "", "U-Boot" },
{ "ppc64", "prep", "", "Open Hack'Ware BIOS" },
{ "ppc64", "pseries", "", "Open Firmware" },
- { "ppc64", "powernv", "-cpu POWER9", "SkiBoot" },
+ { "ppc64", "powernv", "-cpu POWER8", "SkiBoot" },
{ "i386", "isapc", "-cpu qemu32 -device sga", "SGABIOS" },
{ "i386", "pc", "-device sga", "SGABIOS" },
{ "i386", "q35", "-device sga", "SGABIOS" },
diff --git a/tests/pnv-xscom-test.c b/tests/pnv-xscom-test.c
index 5951da1..5adc3fd 100644
--- a/tests/pnv-xscom-test.c
+++ b/tests/pnv-xscom-test.c
@@ -41,7 +41,9 @@ static const PnvChip pnv_chips[] = {
.xscom_core_base = 0x10000000ull,
.cfam_id = 0x120d304980000000ull,
.first_core = 0x1,
- }, {
+ },
+#if 0 /* POWER9 support is not ready yet */
+ {
.chip_type = PNV_CHIP_POWER9,
.cpu_model = "POWER9",
.xscom_base = 0x000603fc00000000ull,
@@ -49,6 +51,7 @@ static const PnvChip pnv_chips[] = {
.cfam_id = 0x100d104980000000ull,
.first_core = 0x20,
},
+#endif
};
static uint64_t pnv_xscom_addr(const PnvChip *chip, uint32_t pcba)
--
2.9.3
- [Qemu-ppc] [PULL 14/17] target/ppc: Rework hash mmu page fault code and add defines for clarity, (continued)
- [Qemu-ppc] [PULL 14/17] target/ppc: Rework hash mmu page fault code and add defines for clarity, David Gibson, 2017/03/02
- [Qemu-ppc] [PULL 07/17] target/ppc/POWER9: Add POWER9 mmu fault handler, David Gibson, 2017/03/02
- [Qemu-ppc] [PULL 06/17] target/ppc: Don't gen an SDR1 on POWER9 and rework register creation, David Gibson, 2017/03/02
- [Qemu-ppc] [PULL 01/17] target/ppc: Add POWER9/ISAv3.00 to compat_table, David Gibson, 2017/03/02
- [Qemu-ppc] [PULL 16/17] spapr: Small cleanup of PPC MMU enums, David Gibson, 2017/03/02
- [Qemu-ppc] [PULL 11/17] target/ppc: Add Instruction Authority Mask Register Check, David Gibson, 2017/03/02
- [Qemu-ppc] [PULL 13/17] target/ppc: Move no-execute and guarded page checking into new function, David Gibson, 2017/03/02
- [Qemu-ppc] [PULL 05/17] target/ppc: Add patb_entry to sPAPRMachineState, David Gibson, 2017/03/02
- [Qemu-ppc] [PULL 17/17] target/ppc: rewrite f[n]m[add, sub] using float64_muladd, David Gibson, 2017/03/02
- [Qemu-ppc] [PULL 04/17] target/ppc/POWER9: Add POWERPC_MMU_V3 bit, David Gibson, 2017/03/02
- [Qemu-ppc] [PULL 03/17] powernv: Don't test POWER9 CPU yet,
David Gibson <=
- [Qemu-ppc] [PULL 02/17] exec, kvm, target-ppc: Move getrampagesize() to common code, David Gibson, 2017/03/02
- [Qemu-ppc] [PULL 12/17] target/ppc: Add execute permission checking to access authority check, David Gibson, 2017/03/02
- [Qemu-ppc] [PULL 09/17] target/ppc/POWER9: Add cpu_has_work function for POWER9, David Gibson, 2017/03/02
- [Qemu-ppc] [PULL 08/17] target/ppc/POWER9: Add POWER9 pa-features definition, David Gibson, 2017/03/02
- Re: [Qemu-ppc] [Qemu-devel] [PULL 00/17] ppc-for-2.9 queue 20170303, no-reply, 2017/03/02
- Re: [Qemu-ppc] [PULL 00/17] ppc-for-2.9 queue 20170303, Peter Maydell, 2017/03/03
- Re: [Qemu-ppc] [PULL 00/17] ppc-for-2.9 queue 20170303, Peter Maydell, 2017/03/04