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Re: [Qemu-ppc] [Qemu-ppc for-2.10] [PATCH V3 5/5] target/ppc: Enable RAD
From: |
Suraj Jitindar Singh |
Subject: |
Re: [Qemu-ppc] [Qemu-ppc for-2.10] [PATCH V3 5/5] target/ppc: Enable RADIX mmu mode for pseries TCG guest |
Date: |
Wed, 12 Apr 2017 16:38:40 +1000 |
On Thu, 2017-03-30 at 17:11 +1100, David Gibson wrote:
> On Wed, Mar 29, 2017 at 04:43:49PM +1100, Suraj Jitindar Singh wrote:
> >
> > Now that we have added all the infrastructure we can enable a
> > pseries TCG
> > guest to use radix.
> >
> > In order to do this we have to add the appropriate bits to the
> > ibm,arch-vec-5-platform-support vector to represent that we support
> > both
> > hash and radix mmu models.
> >
> > Instead of returning an error when trying to handle a fault for a
> > radix
> > guest we call the radix mmu fault handler.
> >
> > A radix guest can now be booted in pseries tcg mode by specifying:
> > -cpu POWER9
> >
> > Note that we assume hash, that is we allocate a hpt, until a guest
> > tells
> > us otherwise via a H_REGISTER_PROCESS_TABLE call with radix
> > specified - in
> > which case we free the hpt. If we were right and the guest is hash
> > then
> > there's nothing for us to do.
> >
> > Signed-off-by: Suraj Jitindar Singh <address@hidden>
> >
> > ---
> >
> > V2 -> V3:
> > - Reword commit message and comments
> > - Assume a hash guest until H_REGISTER_PROCESS_TABLE called with
> > radix
> > specified.
> > ---
> > hw/ppc/spapr.c | 15 +++++++++++----
> > target/ppc/mmu-book3s-v3.c | 6 ++----
> > 2 files changed, 13 insertions(+), 8 deletions(-)
> >
> > diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c
> > index 0e1c29b..f0b99a9 100644
> > --- a/hw/ppc/spapr.c
> > +++ b/hw/ppc/spapr.c
> > @@ -882,6 +882,8 @@ static void spapr_dt_rtas(sPAPRMachineState
> > *spapr, void *fdt)
> > * option vector 5: */
> > static void spapr_dt_ov5_platform_support(void *fdt, int chosen)
> > {
> > + PowerPCCPU *first_ppc_cpu = POWERPC_CPU(first_cpu);
> > +
> > char val[2 * 3] = {
> > 24, 0x00, /* Hash/Radix, filled in below. */
> > 25, 0x00, /* Hash options: Segment Tables == no, GTSE ==
> > no. */
> > @@ -897,8 +899,13 @@ static void spapr_dt_ov5_platform_support(void
> > *fdt, int chosen)
> > val[1] = 0x00; /* Hash */
> > }
> > } else {
> > - /* TODO: TCG case, hash */
> > - val[1] = 0x00;
> > + if (first_ppc_cpu->env.mmu_model & POWERPC_MMU_V3) {
> > + /* V3 MMU supports both hash and radix (with dynamic
> > switching) */
> > + val[1] = 0xC0;
> > + } else {
> > + /* Otherwise we can only do hash */
> > + val[1] = 0x00;
> > + }
> > }
> > _FDT(fdt_setprop(fdt, chosen, "ibm,arch-vec-5-platform-
> > support",
> > val, sizeof(val)));
> > @@ -2128,8 +2135,8 @@ static void ppc_spapr_init(MachineState
> > *machine)
> > }
> >
> > spapr_ovec_set(spapr->ov5, OV5_FORM1_AFFINITY);
> > - if (kvmppc_has_cap_mmu_radix()) {
> > - /* KVM always allows GTSE with radix... */
> > + if (!kvm_enabled() || kvmppc_has_cap_mmu_radix()) {
> > + /* KVM and TCG always allow GTSE with radix... */
> > spapr_ovec_set(spapr->ov5, OV5_MMU_RADIX_GTSE);
> I'm a little confused by GTSE. This logic here suggests GTSE is
> conditional on various things, but I haven't seen any patch actually
> adjusting when tlbie[l] can be called.
Good point, I'll fix this up.
>
> >
> > }
> > /* ... but not with hash (currently). */
> > diff --git a/target/ppc/mmu-book3s-v3.c b/target/ppc/mmu-book3s-
> > v3.c
> > index 005c963..e7798b3 100644
> > --- a/target/ppc/mmu-book3s-v3.c
> > +++ b/target/ppc/mmu-book3s-v3.c
> > @@ -22,15 +22,13 @@
> > #include "cpu.h"
> > #include "mmu-hash64.h"
> > #include "mmu-book3s-v3.h"
> > -#include "qemu/error-report.h"
> > +#include "mmu-radix64.h"
> >
> > int ppc64_v3_handle_mmu_fault(PowerPCCPU *cpu, vaddr eaddr, int
> > rwx,
> > int mmu_idx)
> > {
> > if (ppc64_radix_guest(cpu)) { /* Guest uses radix */
> > - /* TODO - Unsupported */
> > - error_report("Guest Radix Support Unimplemented");
> > - exit(1);
> > + return ppc_radix64_handle_mmu_fault(cpu, eaddr, rwx,
> > mmu_idx);
> > } else { /* Guest uses hash */
> > return ppc_hash64_handle_mmu_fault(cpu, eaddr, rwx,
> > mmu_idx);
> > }
- Re: [Qemu-ppc] [Qemu-ppc for-2.10] [PATCH V3 5/5] target/ppc: Enable RADIX mmu mode for pseries TCG guest,
Suraj Jitindar Singh <=