Re: [Qemu-ppc] [QEMU-ppc for-2.10][PATCH V4 4/6] target/ppc: Change tlbie invalid fields for POWER9 support

[David Gibson]

On Thu, Apr 13, 2017 at 04:02:38PM +1000, Suraj Jitindar Singh wrote:
> The tlbie[l] instructions are used to invalidate TLB entries used to cache
> address translations.
> 
> In ISAv3.00 (POWER9) more fields were added to the tblie[l] instructions
> which were previously invalid. We don't care about any of these new fields
> since we just invalidate the whole world anyway but we need to not
> cause an illegal instruction exception when the instructions are called.
> We also don't want to allow an older processor to have these fields set
> since that would be invalid.
> 
> Add a new GEN_HANDLER for the ISAv3 instructions with the correct invalid
> mask. These will only be generated to a POWER9 processor for now based on
> the instruction flag. Also remove the PPC_MEM_TLBIE instruction flag from
> the POWER9 processor definition to ensure the old tlbie isn't generated.
> 
> Signed-off-by: Suraj Jitindar Singh <address@hidden>

Reviewed-by: David Gibson <address@hidden>

> 
> ---
> 
> V3 -> V4:
> 
> - Instead of changing the invalid mask for the existing tlbie[l] generator
>   create a new one for POWER9 with the correct invalid mask
> ---
>  target/ppc/translate.c      | 2 ++
>  target/ppc/translate_init.c | 2 +-
>  2 files changed, 3 insertions(+), 1 deletion(-)
> 
> diff --git a/target/ppc/translate.c b/target/ppc/translate.c
> index 5f90c03..bbba378 100644
> --- a/target/ppc/translate.c
> +++ b/target/ppc/translate.c
> @@ -6567,6 +6567,8 @@ GEN_HANDLER(tlbia, 0x1F, 0x12, 0x0B, 0x03FFFC01, 
> PPC_MEM_TLBIA),
>   * different ISA versions */
>  GEN_HANDLER(tlbiel, 0x1F, 0x12, 0x08, 0x001F0001, PPC_MEM_TLBIE),
>  GEN_HANDLER(tlbie, 0x1F, 0x12, 0x09, 0x001F0001, PPC_MEM_TLBIE),
> +GEN_HANDLER_E(tlbiel, 0x1F, 0x12, 0x08, 0x00100001, PPC_NONE, PPC2_ISA300),
> +GEN_HANDLER_E(tlbie, 0x1F, 0x12, 0x09, 0x00100001, PPC_NONE, PPC2_ISA300),
>  GEN_HANDLER(tlbsync, 0x1F, 0x16, 0x11, 0x03FFF801, PPC_MEM_TLBSYNC),
>  #if defined(TARGET_PPC64)
>  GEN_HANDLER(slbia, 0x1F, 0x12, 0x0F, 0x031FFC01, PPC_SLBI),
> diff --git a/target/ppc/translate_init.c b/target/ppc/translate_init.c
> index 79f17a0..0c5c57e 100644
> --- a/target/ppc/translate_init.c
> +++ b/target/ppc/translate_init.c
> @@ -8950,7 +8950,7 @@ POWERPC_FAMILY(POWER9)(ObjectClass *oc, void *data)
>                         PPC_FLOAT_EXT |
>                         PPC_CACHE | PPC_CACHE_ICBI | PPC_CACHE_DCBZ |
>                         PPC_MEM_SYNC | PPC_MEM_EIEIO |
> -                       PPC_MEM_TLBIE | PPC_MEM_TLBSYNC |
> +                       PPC_MEM_TLBSYNC |
>                         PPC_64B | PPC_64BX | PPC_ALTIVEC |
>                         PPC_SEGMENT_64B | PPC_SLBI |
>                         PPC_POPCNTB | PPC_POPCNTWD |

-- 
David Gibson                    | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au  | minimalist, thank you.  NOT _the_ _other_
                                | _way_ _around_!
http://www.ozlabs.org/~dgibson

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