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Re: [Qemu-ppc] [PATCH for-2.10 1/2] target/ppc: Implement TIDR
From: |
Cédric Le Goater |
Subject: |
Re: [Qemu-ppc] [PATCH for-2.10 1/2] target/ppc: Implement TIDR |
Date: |
Tue, 8 Aug 2017 11:13:03 +0200 |
User-agent: |
Mozilla/5.0 (X11; Linux x86_64; rv:45.0) Gecko/20100101 Thunderbird/45.8.0 |
On 08/08/2017 08:08 AM, David Gibson wrote:
> This adds a trivial implementation of the TIDR register added in
> POWER9. This isn't particularly important to qemu directly - it's
> used by accelerator modules that we don't emulate.
>
> However, since qemu isn't aware of it, its state is not synchronized
> with KVM and therefore not migrated, which can be a problem.
The Thread ID Register is defined in Power ISA 3.0B.
Reviewed-by: Cédric Le Goater <address@hidden>
C.
>
> Signed-off-by: David Gibson <address@hidden>
> ---
> target/ppc/cpu.h | 1 +
> target/ppc/translate_init.c | 5 +++++
> 2 files changed, 6 insertions(+)
>
> diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h
> index 6ee2a26a96..f6e5413fad 100644
> --- a/target/ppc/cpu.h
> +++ b/target/ppc/cpu.h
> @@ -1451,6 +1451,7 @@ void ppc_compat_add_property(Object *obj, const char
> *name,
> #define SPR_TEXASR (0x082)
> #define SPR_TEXASRU (0x083)
> #define SPR_UCTRL (0x088)
> +#define SPR_TIDR (0x090)
> #define SPR_MPC_CMPA (0x090)
> #define SPR_MPC_CMPB (0x091)
> #define SPR_MPC_CMPC (0x092)
> diff --git a/target/ppc/translate_init.c b/target/ppc/translate_init.c
> index 01723bdfec..94800cd29d 100644
> --- a/target/ppc/translate_init.c
> +++ b/target/ppc/translate_init.c
> @@ -8841,6 +8841,11 @@ static void init_proc_POWER9(CPUPPCState *env)
> gen_spr_power8_book4(env);
> gen_spr_power8_rpr(env);
>
> + /* POWER9 Specific registers */
> + spr_register_kvm(env, SPR_TIDR, "TIDR", NULL, NULL,
> + spr_read_generic, spr_write_generic,
> + KVM_REG_PPC_TIDR, 0);
> +
> /* env variables */
> #if !defined(CONFIG_USER_ONLY)
> env->slb_nr = 32;
>