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Re: [Qemu-ppc] [Qemu-devel] fix evsrwu and others for powerpcspe
From: |
Thomas Huth |
Subject: |
Re: [Qemu-ppc] [Qemu-devel] fix evsrwu and others for powerpcspe |
Date: |
Sat, 10 Feb 2018 08:44:49 +0100 |
User-agent: |
Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.6.0 |
On 10.02.2018 08:25, Michael Tokarev wrote:
> 26.12.2017 14:29, address@hidden wrote:
>> GEN_SPEOP_ARITH2 declares non-local temporaries then calls
>> gen_op_evsrwu/evsrws/evslw which generates branch insn.
>
> I'm Cc'ing qemu-devel@ for review, since I don't know much about how ppc
> works.
For PPC related stuff, please also always send a CC: to
address@hidden (or even better, use the scripts/get_maintainer.pl
script to get the CC: list right).
Also, your patch is missing a proper "Signed-off-by" line. Please have a
look at https://wiki.qemu.org/Contribute/SubmitAPatch for details.
Thanks,
Thomas
>
>> --- target/ppc/translate/spe-impl.inc.c.orig
>> +++ target/ppc/translate/spe-impl.inc.c
>> @@ -158,8 +158,8 @@
>> gen_exception(ctx, POWERPC_EXCP_SPEU);
>> \
>> return;
>> \
>> }
>> \
>> - t0 = tcg_temp_new_i32();
>> \
>> - t1 = tcg_temp_new_i32();
>> \
>> + t0 = tcg_temp_local_new_i32();
>> \
>> + t1 = tcg_temp_local_new_i32();
>> \
>>
>> \
>> tcg_gen_trunc_tl_i32(t0, cpu_gpr[rA(ctx->opcode)]);
>> \
>> tcg_gen_trunc_tl_i32(t1, cpu_gpr[rB(ctx->opcode)]);
>> \
>>
>>
>
>
- Re: [Qemu-ppc] [Qemu-devel] fix evsrwu and others for powerpcspe,
Thomas Huth <=