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[Qemu-stable] [PATCH 07/60] cpu_physical_memory_write_rom() needs to do


From: Michael Tokarev
Subject: [Qemu-stable] [PATCH 07/60] cpu_physical_memory_write_rom() needs to do TB invalidates
Date: Mon, 4 Feb 2013 14:40:17 +0400

From: David Gibson <address@hidden>

cpu_physical_memory_write_rom(), despite the name, can also be used to
write images into RAM - and will often be used that way if the machine
uses load_image_targphys() into RAM addresses.

However, cpu_physical_memory_write_rom(), unlike cpu_physical_memory_rw()
doesn't invalidate any cached TBs which might be affected by the region
written.

This was breaking reset (under full emu) on the pseries machine - we loaded
our firmware image into RAM, and while executing it rewrite the code at
the entry point (correctly causing a TB invalidate/refresh).  When we
reset the firmware image was reloaded, but the TB from the rewrite was
still active and caused us to get an illegal instruction trap.

This patch fixes the bug by duplicating the tb invalidate code from
cpu_physical_memory_rw() in cpu_physical_memory_write_rom().

Signed-off-by: David Gibson <address@hidden>
Signed-off-by: Anthony Liguori <address@hidden>
(cherry picked from commit 0b57e287138728f72d88b06e69b970c5d745c44a)

Signed-off-by: Michael Tokarev <address@hidden>
---
 exec.c |    7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/exec.c b/exec.c
index 0a67f07..8e97f93 100644
--- a/exec.c
+++ b/exec.c
@@ -3625,6 +3625,13 @@ void cpu_physical_memory_write_rom(target_phys_addr_t 
addr,
             /* ROM/RAM case */
             ptr = qemu_get_ram_ptr(addr1);
             memcpy(ptr, buf, l);
+            if (!cpu_physical_memory_is_dirty(addr1)) {
+                /* invalidate code */
+                tb_invalidate_phys_page_range(addr1, addr1 + l, 0);
+                /* set dirty bit */
+                cpu_physical_memory_set_dirty_flags(
+                    addr1, (0xff & ~CODE_DIRTY_FLAG));
+            }
             qemu_put_ram_ptr(ptr);
         }
         len -= l;
-- 
1.7.10.4




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