[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[Qemu-stable] [PULL 3/4] tcg-ppc64: Fix add2_i64
From: |
Richard Henderson |
Subject: |
[Qemu-stable] [PULL 3/4] tcg-ppc64: Fix add2_i64 |
Date: |
Mon, 17 Jun 2013 10:45:28 -0700 |
From: Anton Blanchard <address@hidden>
add2_i64 was adding the lower double word to the upper double word
of each input. Fix this so we add the lower double words, then the
upper double words with carry propagation.
Cc: address@hidden
Signed-off-by: Anton Blanchard <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>
---
tcg/ppc64/tcg-target.c | 14 +++++++-------
1 file changed, 7 insertions(+), 7 deletions(-)
diff --git a/tcg/ppc64/tcg-target.c b/tcg/ppc64/tcg-target.c
index 1d06530..5cdff36 100644
--- a/tcg/ppc64/tcg-target.c
+++ b/tcg/ppc64/tcg-target.c
@@ -1959,18 +1959,18 @@ static void tcg_out_op (TCGContext *s, TCGOpcode opc,
const TCGArg *args,
environment. So in 64-bit mode it's always carry-out of bit 63.
The fallback code using deposit works just as well for 32-bit. */
a0 = args[0], a1 = args[1];
- if (a0 == args[4] || (!const_args[5] && a0 == args[5])) {
+ if (a0 == args[3] || (!const_args[5] && a0 == args[5])) {
a0 = TCG_REG_R0;
}
- if (const_args[3]) {
- tcg_out32(s, ADDIC | TAI(a0, args[2], args[3]));
+ if (const_args[4]) {
+ tcg_out32(s, ADDIC | TAI(a0, args[2], args[4]));
} else {
- tcg_out32(s, ADDC | TAB(a0, args[2], args[3]));
+ tcg_out32(s, ADDC | TAB(a0, args[2], args[4]));
}
if (const_args[5]) {
- tcg_out32(s, (args[5] ? ADDME : ADDZE) | RT(a1) | RA(args[4]));
+ tcg_out32(s, (args[5] ? ADDME : ADDZE) | RT(a1) | RA(args[3]));
} else {
- tcg_out32(s, ADDE | TAB(a1, args[4], args[5]));
+ tcg_out32(s, ADDE | TAB(a1, args[3], args[5]));
}
if (a0 != args[0]) {
tcg_out_mov(s, TCG_TYPE_I64, args[0], a0);
@@ -2148,7 +2148,7 @@ static const TCGTargetOpDef ppc_op_defs[] = {
{ INDEX_op_deposit_i32, { "r", "0", "rZ" } },
{ INDEX_op_deposit_i64, { "r", "0", "rZ" } },
- { INDEX_op_add2_i64, { "r", "r", "r", "rI", "r", "rZM" } },
+ { INDEX_op_add2_i64, { "r", "r", "r", "r", "rI", "rZM" } },
{ INDEX_op_sub2_i64, { "r", "r", "rI", "r", "rZM", "r" } },
{ INDEX_op_muls2_i64, { "r", "r", "r", "r" } },
{ INDEX_op_mulu2_i64, { "r", "r", "r", "r" } },
--
1.8.1.4
[Prev in Thread] |
Current Thread |
[Next in Thread] |
- [Qemu-stable] [PULL 3/4] tcg-ppc64: Fix add2_i64,
Richard Henderson <=