[Simulavr-devel] [patch] improved verbosity on memory faults

[Alexander Stohr]

Hello,

the attached patch adds improved verbosity
to the memory access read and write fault messages.
I have made it against most current CVS sources.

in particular it tells you if it is a mem-addr or an io-register
and if the processor description even has a name for that region
it will display that as well.

i added this because while your project is in device bringup phase
there is a high likeliness that my io acess instructions will raise
a message - and as the simulator already knows its name of the area
it will give me that name as a hint.

maybe it looks a bit like cosmetics, but for anybody now and in future
which is bringing up one more core variant with the n-th new built in
device it will give good hints for what is still waiting for an
implementation as an explicit device.

Other than that, i can imagine sort of memory protection in development, 
like people getting alarmed when operations on code or data are caried
out, that are outside the .text or .data segments of the loaded object 
files. of course that would need people to specify their very own limits
but could be a usefull variant of a bounds checker sheme with named bounds.

Lets hope you will integrate my patch into the project.
-Alex.

-- 
"Sie haben neue Mails!" - Die GMX Toolbar informiert Sie beim Surfen!
Jetzt aktivieren unter http://www.gmx.net/info

named_faults.diff.bz2
Description: Binary data