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Re: [Simulavr-devel] simulavrxx timers


From: Michael Hennebry
Subject: Re: [Simulavr-devel] simulavrxx timers
Date: Fri, 30 May 2008 11:06:32 -0500 (CDT)

On Fri, 30 May 2008, Klaus Rudolph wrote:

> Michael Hennebry schrieb:
> > On Fri, 30 May 2008, Klaus Rudolph wrote:
> >
> >> Michael Hennebry schrieb:
> >>> In HWMegaTimer0::CpuCycle(),
> >>> there is an 8-case switch (tccr) statement.
> >>> Its cases are the possible clock select values.
> >>> Is that correct?
> >> Right!
> >>> tccr contains more than the CS bits,
> >>>
> >> Right! Rest of bits will compared in TimerCompareAfterCount();
> >
> > In HWMegaTimer0::CpuCycle(), why tccr and not tccr & 7?
>
> My version has:
> unsigned int HWMegaTimer0::CpuCycle(){
>      switch (tccr & 0x07) { // CS00..CS02
>
> ????

I'll do a cvs diff when I get home.

-- 
Michael   address@hidden
"Those parts of the system that you can hit with a hammer (not advised)
are called Hardware;  those program instructions that you can only
curse at are called Software."





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