>From 2ccb7a597f1acff24e088197efae82a864572294 Mon Sep 17 00:00:00 2001
From: panic
Date: Thu, 15 Jun 2017 23:46:25 +0200
Subject: [PATCH] use static callbacks instead of template param for IOReg
class
---
src/at4433.cpp | 4 +-
src/at8515.cpp | 2 +-
src/at90canbase.cpp | 6 +-
src/atmega128.cpp | 6 +-
src/atmega1284abase.cpp | 6 +-
src/atmega16_32.cpp | 6 +-
src/atmega2560base.cpp | 6 +-
src/atmega668base.cpp | 12 ++--
src/atmega8.cpp | 12 ++--
src/attiny25_45_85.cpp | 4 +-
src/externalirq.cpp | 2 +-
src/flashprog.h | 6 +-
src/hwacomp.h | 8 ++-
src/hwad.h | 19 ++++--
src/hweeprom.h | 10 +++-
src/hwpinchange.cpp | 30 +++++-----
src/hwpinchange.h | 77 +++++++++++++++++--------
src/hwport.cpp | 2 +-
src/hwport.h | 28 +++++----
src/hwspi.h | 16 ++++--
src/hwstack.h | 12 +++-
src/hwtimer/hwtimer.h | 150 +++++++++++++++++++++++++++++++++++-------------
src/hwuart.h | 22 +++++--
src/hwusi.h | 20 +++++--
src/hwwado.h | 7 ++-
src/ioregs.h | 6 +-
src/pin.h | 4 +-
src/pinatport.cpp | 2 +-
src/rwmem.h | 30 +++++++---
29 files changed, 353 insertions(+), 162 deletions(-)
diff --git a/src/at4433.cpp b/src/at4433.cpp
index fc212d1..6805772 100644
--- a/src/at4433.cpp
+++ b/src/at4433.cpp
@@ -52,8 +52,8 @@ AvrDevice_at90s4433::AvrDevice_at90s4433():
portc= new HWPort(this, "C");
portd= new HWPort(this, "D");
- admux = new HWAdmux6(this, &portc->GetPin(0), &portc->GetPin(1), &portc->GetPin(2),
- &portc->GetPin(3), &portc->GetPin(4), &portc->GetPin(5));
+ admux = new HWAdmux6(this, &portc->GetPhysPin(0), &portc->GetPhysPin(1), &portc->GetPhysPin(2),
+ &portc->GetPhysPin(3), &portc->GetPhysPin(4), &portc->GetPhysPin(5));
aref = new HWARefPin(this);
ad = new HWAd(this, HWAd::AD_4433, irqSystem, 11, admux, aref); // vec 11 ADConversion Complete
diff --git a/src/at8515.cpp b/src/at8515.cpp
index 336aa98..68a574a 100644
--- a/src/at8515.cpp
+++ b/src/at8515.cpp
@@ -37,7 +37,7 @@ AVR_REGISTER(at90s8515, AvrDevice_at90s8515)
AvrDevice_at90s8515::AvrDevice_at90s8515():
AvrDevice(64, 512, 0xfda0, 8192),
portx(this, "X"),
- ocr1b(portx.GetPin(0))
+ ocr1b(portx.GetPhysPin(0))
{
flagJMPInstructions = false;
flagMULInstructions = false;
diff --git a/src/at90canbase.cpp b/src/at90canbase.cpp
index a1f08b0..db105e4 100644
--- a/src/at90canbase.cpp
+++ b/src/at90canbase.cpp
@@ -193,9 +193,9 @@ AvrDevice_at90canbase::AvrDevice_at90canbase(unsigned ram_bytes,
gpior1_reg = new GPIORegister(this, &coreTraceGroup, "GPIOR1");
gpior2_reg = new GPIORegister(this, &coreTraceGroup, "GPIOR2");
- admux = new HWAdmuxM16(this, &portf.GetPin(0), &portf.GetPin(1), &portf.GetPin(2),
- &portf.GetPin(3), &portf.GetPin(4), &portf.GetPin(5),
- &portf.GetPin(6), &portf.GetPin(7));
+ admux = new HWAdmuxM16(this, &portf.GetPhysPin(0), &portf.GetPhysPin(1), &portf.GetPhysPin(2),
+ &portf.GetPhysPin(3), &portf.GetPhysPin(4), &portf.GetPhysPin(5),
+ &portf.GetPhysPin(6), &portf.GetPhysPin(7));
aref = new HWARef4(this, HWARef4::REFTYPE_NOBG);
ad = new HWAd(this, HWAd::AD_M164, irqSystem, 25, admux, aref);
diff --git a/src/atmega128.cpp b/src/atmega128.cpp
index 18d4b88..a2fee51 100644
--- a/src/atmega128.cpp
+++ b/src/atmega128.cpp
@@ -116,9 +116,9 @@ AvrDevice_atmega128base::AvrDevice_atmega128base(unsigned flash_bytes,
sfior_reg = new IOSpecialReg(&coreTraceGroup, "SFIOR");
- admux = new HWAdmuxM16(this, &portf->GetPin(0), &portf->GetPin(1), &portf->GetPin(2),
- &portf->GetPin(3), &portf->GetPin(4), &portf->GetPin(5),
- &portf->GetPin(6), &portf->GetPin(7));
+ admux = new HWAdmuxM16(this, &portf->GetPhysPin(0), &portf->GetPhysPin(1), &portf->GetPhysPin(2),
+ &portf->GetPhysPin(3), &portf->GetPhysPin(4), &portf->GetPhysPin(5),
+ &portf->GetPhysPin(6), &portf->GetPhysPin(7));
aref = new HWARef4(this, HWARef4::REFTYPE_NOBG);
// vector 21 ADConversion Complete
ad = new HWAd(this, (is_m128) ? HWAd::AD_M128 : HWAd::AD_M64, irqSystem, 21, admux, aref);
diff --git a/src/atmega1284abase.cpp b/src/atmega1284abase.cpp
index e506c19..4a2ff47 100644
--- a/src/atmega1284abase.cpp
+++ b/src/atmega1284abase.cpp
@@ -197,9 +197,9 @@ AvrDevice_atmega1284Abase::AvrDevice_atmega1284Abase(unsigned ram_bytes,
gpior1_reg = new GPIORegister(this, &coreTraceGroup, "GPIOR1");
gpior2_reg = new GPIORegister(this, &coreTraceGroup, "GPIOR2");
- admux = new HWAdmuxM16(this, &porta.GetPin(0), &porta.GetPin(1), &porta.GetPin(2),
- &porta.GetPin(3), &porta.GetPin(4), &porta.GetPin(5),
- &porta.GetPin(6), &porta.GetPin(7));
+ admux = new HWAdmuxM16(this, &porta.GetPhysPin(0), &porta.GetPhysPin(1), &porta.GetPhysPin(2),
+ &porta.GetPhysPin(3), &porta.GetPhysPin(4), &porta.GetPhysPin(5),
+ &porta.GetPhysPin(6), &porta.GetPhysPin(7));
aref = new HWARef4(this, HWARef4::REFTYPE_BG3);
ad = new HWAd(this, HWAd::AD_M164, irqSystem, 24, admux, aref);
diff --git a/src/atmega16_32.cpp b/src/atmega16_32.cpp
index 14481f0..695db2b 100644
--- a/src/atmega16_32.cpp
+++ b/src/atmega16_32.cpp
@@ -100,9 +100,9 @@ AvrDevice_atmega16_32::AvrDevice_atmega16_32(unsigned ram_bytes,
sfior_reg = new IOSpecialReg(&coreTraceGroup, "SFIOR");
- admux = new HWAdmuxM16(this, &porta->GetPin(0), &porta->GetPin(1), &porta->GetPin(2),
- &porta->GetPin(3), &porta->GetPin(4), &porta->GetPin(5),
- &porta->GetPin(6), &porta->GetPin(7));
+ admux = new HWAdmuxM16(this, &porta->GetPhysPin(0), &porta->GetPhysPin(1), &porta->GetPhysPin(2),
+ &porta->GetPhysPin(3), &porta->GetPhysPin(4), &porta->GetPhysPin(5),
+ &porta->GetPhysPin(6), &porta->GetPhysPin(7));
aref = new HWARef4(this, HWARef4::REFTYPE_NOBG);
ad = new HWAd_SFIOR(this, HWAd::AD_M16, irqSystem, atmega16 ? 14 : 16, admux, aref, sfior_reg);
diff --git a/src/atmega2560base.cpp b/src/atmega2560base.cpp
index 5a5d8a5..9202287 100644
--- a/src/atmega2560base.cpp
+++ b/src/atmega2560base.cpp
@@ -277,9 +277,9 @@ AvrDevice_atmega2560base::AvrDevice_atmega2560base(unsigned ram_bytes,
gpior1_reg = new GPIORegister(this, &coreTraceGroup, "GPIOR1");
gpior2_reg = new GPIORegister(this, &coreTraceGroup, "GPIOR2");
- admux = new HWAdmuxM16(this, &porta.GetPin(0), &porta.GetPin(1), &porta.GetPin(2),
- &porta.GetPin(3), &porta.GetPin(4), &porta.GetPin(5),
- &porta.GetPin(6), &porta.GetPin(7));
+ admux = new HWAdmuxM16(this, &porta.GetPhysPin(0), &porta.GetPhysPin(1), &porta.GetPhysPin(2),
+ &porta.GetPhysPin(3), &porta.GetPhysPin(4), &porta.GetPhysPin(5),
+ &porta.GetPhysPin(6), &porta.GetPhysPin(7));
aref = new HWARef4(this, HWARef4::REFTYPE_BG3);
ad = new HWAd(this, HWAd::AD_M164, irqSystem, 29, admux, aref);
diff --git a/src/atmega668base.cpp b/src/atmega668base.cpp
index 595507e..d208bf0 100644
--- a/src/atmega668base.cpp
+++ b/src/atmega668base.cpp
@@ -199,12 +199,12 @@ AvrDevice_atmega668base::AvrDevice_atmega668base(unsigned ram_bytes,
gpior1_reg = new GPIORegister(this, &coreTraceGroup, "GPIOR1");
gpior2_reg = new GPIORegister(this, &coreTraceGroup, "GPIOR2");
- admux = new HWAdmuxM8(this, &portc.GetPin(0), // ADC0
- &portc.GetPin(1), // ADC1
- &portc.GetPin(2), // ADC2
- &portc.GetPin(3), // ADC3
- &portc.GetPin(4), // ADC4
- &portc.GetPin(5), // ADC5
+ admux = new HWAdmuxM8(this, &portc.GetPhysPin(0), // ADC0
+ &portc.GetPhysPin(1), // ADC1
+ &portc.GetPhysPin(2), // ADC2
+ &portc.GetPhysPin(3), // ADC3
+ &portc.GetPhysPin(4), // ADC4
+ &portc.GetPhysPin(5), // ADC5
&adc6, // ADC6 only TQFP version
&adc7); // ADC7 only TQFP version
diff --git a/src/atmega8.cpp b/src/atmega8.cpp
index 3cbf0c5..d3394f7 100644
--- a/src/atmega8.cpp
+++ b/src/atmega8.cpp
@@ -60,12 +60,12 @@ AvrDevice_atmega8::AvrDevice_atmega8() :
sfior_reg = new IOSpecialReg(&coreTraceGroup, "SFIOR");
- admux = new HWAdmuxM8(this, &portc->GetPin(0), // ADC0
- &portc->GetPin(1), // ADC1
- &portc->GetPin(2), // ADC2
- &portc->GetPin(3), // ADC3
- &portc->GetPin(4), // ADC4
- &portc->GetPin(5), // ADC5
+ admux = new HWAdmuxM8(this, &portc->GetPhysPin(0), // ADC0
+ &portc->GetPhysPin(1), // ADC1
+ &portc->GetPhysPin(2), // ADC2
+ &portc->GetPhysPin(3), // ADC3
+ &portc->GetPhysPin(4), // ADC4
+ &portc->GetPhysPin(5), // ADC5
&adc6, // ADC6 only TQFP version
&adc7); // ADC7 only TQFP version
diff --git a/src/attiny25_45_85.cpp b/src/attiny25_45_85.cpp
index bf44741..8b16f01 100644
--- a/src/attiny25_45_85.cpp
+++ b/src/attiny25_45_85.cpp
@@ -148,8 +148,8 @@ AvrDevice_attinyX5::AvrDevice_attinyX5(unsigned ram_bytes,
new PinAtPort(portb, 3));
// ADC
- admux = new HWAdmuxT25(this, &portb->GetPin(5), &portb->GetPin(2), &portb->GetPin(4), &portb->GetPin(3));
- aref = new HWARef8(this, &portb->GetPin(0));
+ admux = new HWAdmuxT25(this, &portb->GetPhysPin(5), &portb->GetPhysPin(2), &portb->GetPhysPin(4), &portb->GetPhysPin(3));
+ aref = new HWARef8(this, &portb->GetPhysPin(0));
ad = new HWAd(this, HWAd::AD_T25, irqSystem, 8, admux, aref);
// Analog comparator
diff --git a/src/externalirq.cpp b/src/externalirq.cpp
index de19c77..715d294 100644
--- a/src/externalirq.cpp
+++ b/src/externalirq.cpp
@@ -223,7 +223,7 @@ ExternalIRQPort::ExternalIRQPort(IOSpecialReg *ctrl, HWPort *port):
portSize = port->GetPortSize();
for(unsigned int idx = 0; idx < 8; idx++) {
if(idx < portSize) {
- Pin *p = &port->GetPin((unsigned char)idx);
+ Pin *p = &port->GetPhysPin((unsigned char)idx);
pins[idx] = p;
state[idx] = (bool)*p;
p->RegisterCallback(this);
diff --git a/src/flashprog.h b/src/flashprog.h
index 595358c..d4c21a6 100644
--- a/src/flashprog.h
+++ b/src/flashprog.h
@@ -36,6 +36,10 @@ class AvrDevice;
/*! \todo not implemented yet: SPM interrupt. Support of LPM operation.
Setting boot lock bits. Read-While-Write, if run code in NRWW section. */
class FlashProgramming: public Hardware {
+ private:
+#ifndef SWIG
+ IOREG_SETGET_UCHAR(FlashProgramming, Spmcr)
+#endif
protected:
//! states of processing engine
@@ -92,7 +96,7 @@ class FlashProgramming: public Hardware {
void SetSpmcr(unsigned char v);
unsigned char GetSpmcr() { return spmcr_val; }
- IOReg spmcr_reg;
+ IOReg spmcr_reg;
};
diff --git a/src/hwacomp.h b/src/hwacomp.h
index 8b387fc..e00d6db 100644
--- a/src/hwacomp.h
+++ b/src/hwacomp.h
@@ -45,6 +45,11 @@ class HWAcomp: public Hardware,
public IOSpecialRegClient,
public AnalogSignalChange {
+ private:
+#ifndef SWIG
+ IOREG_SETGET_UCHAR(HWAcomp, Acsr)
+#endif
+
protected:
HWIrqSystem *irqSystem; //!< connection to IRQ controller
PinAtPort pinAin0; //!< port pin AIN0
@@ -79,7 +84,7 @@ class HWAcomp: public Hardware,
ACIS0 = 0x01
};
- IOReg acsr_reg; //!< ACSR IO register
+ IOReg acsr_reg; //!< ACSR IO register
//! constructor to instantiate a analog comparator peripheral
HWAcomp(AvrDevice *core,
@@ -112,7 +117,6 @@ class HWAcomp: public Hardware,
bool GetACO(void) { return ((acsr & ACO) == ACO); }
// Interface for notify signal change in ADC multiplexer
void NotifySignalChanged(void);
-
};
#endif
diff --git a/src/hwad.h b/src/hwad.h
index c0a4a1e..5aedf5b 100644
--- a/src/hwad.h
+++ b/src/hwad.h
@@ -179,6 +179,15 @@ class HWAdmuxT25: public HWAdmuxM8 {
/** Analog-digital converter (ADC) */
class HWAd: public Hardware, public TraceValueRegister, public AnalogSignalChange {
+ private:
+#ifndef SWIG
+ IOREG_GET_UCHAR(HWAd, Adch)
+ IOREG_GET_UCHAR(HWAd, Adcl)
+ IOREG_SETGET_UCHAR(HWAd, AdcsrA)
+ IOREG_SETGET_UCHAR(HWAd, AdcsrB)
+ IOREG_SETGET_UCHAR(HWAd, Admux)
+#endif
+
protected:
int adType;
unsigned char adch;
@@ -240,11 +249,11 @@ class HWAd: public Hardware, public TraceValueRegister, public AnalogSignalChang
AD_T25 //!< ADC type T25: ADC on attiny25/45/85
};
- IOReg adch_reg,
- adcl_reg,
- adcsra_reg,
- adcsrb_reg,
- admux_reg;
+ IOReg adch_reg,
+ adcl_reg,
+ adcsra_reg,
+ adcsrb_reg,
+ admux_reg;
HWAd(AvrDevice *c, int _typ, HWIrqSystem *i, unsigned int iv, HWAdmux *a, HWARef *r);
virtual ~HWAd() { mux->UnregisterNotifyClient(); }
diff --git a/src/hweeprom.h b/src/hweeprom.h
index df50308..7cd1fb3 100644
--- a/src/hweeprom.h
+++ b/src/hweeprom.h
@@ -33,6 +33,14 @@
#include "irqsystem.h"
class HWEeprom: public Hardware, public Memory, public TraceValueRegister {
+ private:
+#ifndef SWIG
+ IOREG_SETGET_UCHAR(HWEeprom, Eearl)
+ IOREG_SETGET_UCHAR(HWEeprom, Eearh)
+ IOREG_SETGET_UCHAR(HWEeprom, Eedr)
+ IOREG_SETGET_UCHAR(HWEeprom, Eecr)
+#endif
+
protected:
AvrDevice *core;
unsigned int eear;
@@ -97,7 +105,7 @@ class HWEeprom: public Hardware, public Memory, public TraceValueRegister {
unsigned char GetEecr() { return eecr; }
unsigned char GetEedr() { return eedr; }
- IOReg
+ IOReg
eearh_reg,
eearl_reg,
eedr_reg,
diff --git a/src/hwpinchange.cpp b/src/hwpinchange.cpp
index 43e4e3a..e655e7c 100644
--- a/src/hwpinchange.cpp
+++ b/src/hwpinchange.cpp
@@ -28,16 +28,16 @@ HWPcir::HWPcir( AvrDevice* avr,
_vector5(vector5),
_vector6(vector6),
_vector7(vector7),
- pcicr_reg(avr, "PINCHANGE.PCICR", this, &HWPcir::getPcicrMask,
- &HWPcir::setPcicrMask),
- pcifr_reg(avr, "PINCHANGE.PCIFR", this, &HWPcir::getPcifrMask,
- &HWPcir::setPcifrMask)
+ pcicr_reg(avr, "PINCHANGE.PCICR", this, &HWPcir::GetPcicrMask,
+ &HWPcir::SetPcicrMask),
+ pcifr_reg(avr, "PINCHANGE.PCIFR", this, &HWPcir::GetPcifrMask,
+ &HWPcir::SetPcifrMask)
{
assert(false); // Unreachable. No code ever constructs this class.
irqSystem.DebugVerifyInterruptVector(_vector0, this);
}
-bool HWPcir::getPcifr(unsigned pcifrBit) throw(){
+bool HWPcir::GetPcifr(unsigned pcifrBit) throw(){
return _pcifr & (1<(this_ptr)->GetPcifr(pcifrBit);
+ }
+ static void SetPcifr(void *this_ptr, unsigned pcifrBit) throw() {
+ static_cast(this_ptr)->SetPcifr(pcifrBit);
+ }
+
+ static void SetPcifrMask(void *this_ptr, unsigned char val) throw() {
+ static_cast(this_ptr)->SetPcifrMask(val);
+ }
+ static unsigned char GetPcifrMask(void *this_ptr) throw() {
+ return static_cast(this_ptr)->GetPcifrMask();
+ }
+
+ static void SetPcicrMask(void *this_ptr, unsigned char val) throw() {
+ static_cast(this_ptr)->SetPcicrMask(val);
+ }
+ static unsigned char GetPcicrMask(void *this_ptr) throw() {
+ return static_cast(this_ptr)->GetPcicrMask();
+ }
+#endif
+
public: // HWPcifrApi
- bool getPcifr(unsigned pcifrBit) throw();
- void setPcifr(unsigned pcifrBit) throw();
+ bool GetPcifr(unsigned pcifrBit) throw();
+ void SetPcifr(unsigned pcifrBit) throw();
public: // HWPcirMaskApi
- void setPcifrMask(unsigned char val) throw();
- unsigned char getPcifrMask() throw();
+ void SetPcifrMask(unsigned char val) throw();
+ unsigned char GetPcifrMask() throw();
- void setPcicrMask(unsigned char val) throw();
- unsigned char getPcicrMask() throw();
+ void SetPcicrMask(unsigned char val) throw();
+ unsigned char GetPcicrMask() throw();
-
- IOReg
+ IOReg
pcicr_reg,
pcifr_reg;
@@ -113,6 +135,15 @@ class HWPcmsk : public HWPcmskApi , public HWPcmskPinApi {
unsigned char _pcmsk;
const unsigned _pcifrBit;
+#ifndef SWIG
+ static void SetPcmskMask(void *this_ptr, unsigned char val) throw() {
+ static_cast(this_ptr)->SetPcmskMask(val);
+ }
+ static unsigned char GetPcmskMask(void *this_ptr) throw() {
+ return static_cast(this_ptr)->GetPcmskMask();
+ }
+#endif
+
public:
// constructor
HWPcmsk(
@@ -122,13 +153,13 @@ class HWPcmsk : public HWPcmskApi , public HWPcmskPinApi {
) throw();
public: // HWPcmskApi
- void setPcmskMask(unsigned char val) throw();
- unsigned char getPcmskMask() throw();
+ void SetPcmskMask(unsigned char val) throw();
+ unsigned char GetPcmskMask() throw();
public: // HWPcmskPinApi
void pinChanged(unsigned bit) throw();
- IOReg pcmsk_reg;
+ IOReg pcmsk_reg;
};
// This class monitors a single pin for changes
diff --git a/src/hwport.cpp b/src/hwport.cpp
index 5d5f26b..77c3a16 100644
--- a/src/hwport.cpp
+++ b/src/hwport.cpp
@@ -85,7 +85,7 @@ void HWPort::Reset(void) {
CalcOutputs();
}
-Pin& HWPort::GetPin(unsigned char pinNo) {
+Pin& HWPort::GetPhysPin(unsigned char pinNo) {
assert(pinNo < sizeof(p)/sizeof(p[0]));
return p[pinNo];
}
diff --git a/src/hwport.h b/src/hwport.h
index eeeebd8..42e6acd 100644
--- a/src/hwport.h
+++ b/src/hwport.h
@@ -42,7 +42,7 @@
connected to pin if ddr is set to output! */
class HWPort: public Hardware, public TraceValueRegister {
- protected:
+ private:
std::string myName; //!< the "name" of the port
unsigned char port; //!< port output register
@@ -55,7 +55,22 @@ class HWPort: public Hardware, public TraceValueRegister {
unsigned char portMask; //!< mask out unused bits, if necessary
bool portToggleFeature; //!< controls functionality of SetPin method (write to PIN toggles port register)
+#ifndef SWIG
+ // callback handlers
+ IOREG_SETGET_UCHAR(HWPort, Port)
+ IOREG_SETGET_UCHAR(HWPort, Ddr)
+ IOREG_SETGET_UCHAR(HWPort, Pin)
+#endif
+
public:
+ void SetPort(unsigned char val) { port = val & portMask; CalcOutputs(); } //!< setter method for port register
+ void SetDdr(unsigned char val) { ddr = val & portMask; CalcOutputs(); } //!< setter method for data direction register
+ void SetPin(unsigned char val); //!< setter method for PIN register (for new devices with toggle port)
+ void SetPinBit(unsigned char bitpos, bool bval);
+ unsigned char GetPort(void) { return port; } //!< getter method for port register
+ unsigned char GetDdr(void) { return ddr; } //!< getter method for data direction register
+ unsigned char GetPin(void) { return pin; } //!< getter method for PIN register
+
HWPort(AvrDevice *core, const std::string &name, bool portToggle = false, int size = 8);
~HWPort();
@@ -63,19 +78,12 @@ class HWPort: public Hardware, public TraceValueRegister {
std::string GetPortString(void); //!< returns a string representation of output states
void Reset(void);
std::string GetName(void) { return myName; } //!< returns the port name as given in constructor
- Pin& GetPin(unsigned char pinNo); //!< returns a pin reference of pin with pin number
+ Pin& GetPhysPin(unsigned char pinNo); //!< returns a pin reference of pin with pin number
int GetPortSize(void) { return portSize; } //!< returns, how much bits this port controls
- void SetPort(unsigned char val) { port = val & portMask; CalcOutputs(); } //!< setter method for port register
- void SetDdr(unsigned char val) { ddr = val & portMask; CalcOutputs(); } //!< setter method for data direction register
- void SetPin(unsigned char val); //!< setter method for PIN register (for new devices with toggle port)
- unsigned char GetPort(void) { return port; } //!< getter method for port register
- unsigned char GetDdr(void) { return ddr; } //!< getter method for data direction register
- unsigned char GetPin(void) { return pin; } //!< getter method for PIN register
-
friend class PinAtPort;
- IOReg
+ IOReg
port_reg,
pin_reg,
ddr_reg;
diff --git a/src/hwspi.h b/src/hwspi.h
index d0487cf..058d271 100644
--- a/src/hwspi.h
+++ b/src/hwspi.h
@@ -98,6 +98,12 @@ class HWSpi: public Hardware, public TraceValueRegister {
//! Called for all SPDR access to clear the WCOL and SPIF flags if needed
void spdr_access();
+#ifndef SWIG
+ IOREG_SETGET_UCHAR(HWSpi, SPDR)
+ IOREG_SETGET_UCHAR(HWSpi, SPSR)
+ IOREG_SETGET_UCHAR(HWSpi, SPCR)
+#endif
+
public:
HWSpi(AvrDevice *core,
HWIrqSystem *,
@@ -118,12 +124,12 @@ class HWSpi: public Hardware, public TraceValueRegister {
unsigned char GetSPDR();
unsigned char GetSPSR();
unsigned char GetSPCR();
-
+
void ClearIrqFlag(unsigned int);
-
- IOReg spdr_reg,
- spsr_reg,
- spcr_reg;
+
+ IOReg spdr_reg,
+ spsr_reg,
+ spcr_reg;
};
#endif
diff --git a/src/hwstack.h b/src/hwstack.h
index a9db9e1..6e04cc3 100644
--- a/src/hwstack.h
+++ b/src/hwstack.h
@@ -130,6 +130,12 @@ class HWStack {
//! Implements a stack with stack register using RAM as stackarea
class HWStackSram: public HWStack, public TraceValueRegister {
+ private:
+#ifndef SWIG
+ IOREG_SETGET_UCHAR(HWStackSram, Spl)
+ IOREG_SETGET_UCHAR(HWStackSram, Sph)
+#endif
+
protected:
unsigned long stackCeil;
bool initRAMEND;
@@ -139,7 +145,7 @@ class HWStackSram: public HWStack, public TraceValueRegister {
unsigned char GetSpl();
unsigned char GetSph();
void OnSPReadByTarget();
-
+
public:
//! Creates a stack instance
HWStackSram(AvrDevice *core, int bitsize, bool initRAMEND = false);
@@ -151,8 +157,8 @@ class HWStackSram: public HWStack, public TraceValueRegister {
virtual void Reset();
- IOReg sph_reg;
- IOReg spl_reg;
+ IOReg sph_reg;
+ IOReg spl_reg;
};
//! Implements a stack with 3 levels deep (used as returnstack by ATtiny15 an other)
diff --git a/src/hwtimer/hwtimer.h b/src/hwtimer/hwtimer.h
index 8596e74..4b5170c 100644
--- a/src/hwtimer/hwtimer.h
+++ b/src/hwtimer/hwtimer.h
@@ -201,6 +201,13 @@ class BasicTimerUnit: public Hardware, public TraceValueRegister {
//! Extends BasicTimerUnit to provide common support to all types of 8Bit timer units
class HWTimer8: public BasicTimerUnit {
+ private:
+#ifndef SWIG
+ IOREG_SETGET_UCHAR(HWTimer8, _TCNT)
+ IOREG_SETGET_UCHAR(HWTimer8, _OCRA)
+ IOREG_SETGET_UCHAR(HWTimer8, _OCRB)
+#endif
+
protected:
//! Change WGM mode, set counter limits
void ChangeWGM(WGMtype mode);
@@ -224,11 +231,11 @@ class HWTimer8: public BasicTimerUnit {
void Set_OCRB(unsigned char val) { SetCompareRegister(1, val); }
//! Register access to read output compare register B
unsigned char Get_OCRB() { return GetCompareRegister(1); }
-
+
public:
- IOReg tcnt_reg; //!< counter register
- IOReg ocra_reg; //!< output compare A register
- IOReg ocrb_reg; //!< output compare B register
+ IOReg tcnt_reg; //!< counter register
+ IOReg ocra_reg; //!< output compare A register
+ IOReg ocrb_reg; //!< output compare B register
HWTimer8(AvrDevice *core,
PrescalerMultiplexer *p,
@@ -245,6 +252,20 @@ class HWTimer8: public BasicTimerUnit {
//! Extends BasicTimerUnit to provide common support to all types of 16Bit timer units
class HWTimer16: public BasicTimerUnit {
+ private:
+#ifndef SWIG
+ IOREG_SETGET_UCHAR(HWTimer16, _TCNTH)
+ IOREG_SETGET_UCHAR(HWTimer16, _TCNTL)
+ IOREG_SETGET_UCHAR(HWTimer16, _OCRAH)
+ IOREG_SETGET_UCHAR(HWTimer16, _OCRAL)
+ IOREG_SETGET_UCHAR(HWTimer16, _OCRBH)
+ IOREG_SETGET_UCHAR(HWTimer16, _OCRBL)
+ IOREG_SETGET_UCHAR(HWTimer16, _OCRCH)
+ IOREG_SETGET_UCHAR(HWTimer16, _OCRCL)
+ IOREG_SETGET_UCHAR(HWTimer16, _ICRH)
+ IOREG_SETGET_UCHAR(HWTimer16, _ICRL)
+#endif
+
protected:
//! the high byte temporary register for read/write access to TCNT and ICR
unsigned char accessTempRegister;
@@ -307,16 +328,16 @@ class HWTimer16: public BasicTimerUnit {
unsigned char Get_ICRL() { return GetComplexRegister(true, false); }
public:
- IOReg tcnt_h_reg; //!< counter register, high byte
- IOReg tcnt_l_reg; //!< counter register, low byte
- IOReg ocra_h_reg; //!< output compare A register, high byte
- IOReg ocra_l_reg; //!< output compare A register, low byte
- IOReg ocrb_h_reg; //!< output compare B register, high byte
- IOReg ocrb_l_reg; //!< output compare B register, low byte
- IOReg ocrc_h_reg; //!< output compare C register, high byte
- IOReg ocrc_l_reg; //!< output compare C register, low byte
- IOReg icr_h_reg; //!< input capture register, high byte
- IOReg icr_l_reg; //!< input capture register, low byte
+ IOReg tcnt_h_reg; //!< counter register, high byte
+ IOReg tcnt_l_reg; //!< counter register, low byte
+ IOReg ocra_h_reg; //!< output compare A register, high byte
+ IOReg ocra_l_reg; //!< output compare A register, low byte
+ IOReg ocrb_h_reg; //!< output compare B register, high byte
+ IOReg ocrb_l_reg; //!< output compare B register, low byte
+ IOReg ocrc_h_reg; //!< output compare C register, high byte
+ IOReg ocrc_l_reg; //!< output compare C register, low byte
+ IOReg icr_h_reg; //!< input capture register, high byte
+ IOReg icr_l_reg; //!< input capture register, low byte
HWTimer16(AvrDevice *core,
PrescalerMultiplexer *p,
@@ -346,6 +367,11 @@ class HWTimer16: public BasicTimerUnit {
+---+---+---+---+---+----+----+----+ \endverbatim */
class HWTimer8_0C: public HWTimer8 {
+ private:
+#ifndef SWIG
+ IOREG_SETGET_UCHAR(HWTimer8_0C, _TCCR)
+#endif
+
protected:
unsigned char tccr_val; //!< register value TCCR
@@ -353,9 +379,9 @@ class HWTimer8_0C: public HWTimer8 {
void Set_TCCR(unsigned char val);
//! Register access to read control register
unsigned char Get_TCCR() { return tccr_val; }
-
+
public:
- IOReg tccr_reg; //!< control register
+ IOReg tccr_reg; //!< control register
HWTimer8_0C(AvrDevice *core,
PrescalerMultiplexer *p,
@@ -376,6 +402,10 @@ class HWTimer8_0C: public HWTimer8 {
+----+-----+-----+-----+-----+----+----+----+ \endverbatim */
class HWTimer8_1C: public HWTimer8 {
+ private:
+#ifndef SWIG
+ IOREG_SETGET_UCHAR(HWTimer8_1C, _TCCR)
+#endif
protected:
unsigned char tccr_val; //!< register value TCCR
@@ -383,9 +413,9 @@ class HWTimer8_1C: public HWTimer8 {
void Set_TCCR(unsigned char val);
//! Register access to read control register
unsigned char Get_TCCR() { return tccr_val; }
-
+
public:
- IOReg tccr_reg; //!< control register
+ IOReg tccr_reg; //!< control register
HWTimer8_1C(AvrDevice *core,
PrescalerMultiplexer *p,
@@ -421,6 +451,11 @@ class HWTimer8_2C: public HWTimer8 {
//! Handle special WGM setting, translate wgm raw value to wgm value
void Set_WGM(int val);
+#ifndef SWIG
+ IOREG_SETGET_UCHAR(HWTimer8_2C, _TCCRA)
+ IOREG_SETGET_UCHAR(HWTimer8_2C, _TCCRB)
+#endif
+
protected:
unsigned char tccra_val; //!< register value TCCRA
unsigned char tccrb_val; //!< register value TCCRB
@@ -436,8 +471,8 @@ class HWTimer8_2C: public HWTimer8 {
unsigned char Get_TCCRB() { return tccrb_val; }
public:
- IOReg tccra_reg; //!< control register A
- IOReg tccrb_reg; //!< control register B
+ IOReg tccra_reg; //!< control register A
+ IOReg tccrb_reg; //!< control register B
HWTimer8_2C(AvrDevice *core,
PrescalerMultiplexer *p,
@@ -475,6 +510,10 @@ class HWTimer16_1C: public HWTimer16 {
//! Handle special WGM setting, translate wgm raw value to wgm value
void Set_WGM(int val);
+#ifndef SWIG
+ IOREG_SETGET_UCHAR(HWTimer16_1C, _TCCRA)
+ IOREG_SETGET_UCHAR(HWTimer16_1C, _TCCRB)
+#endif
protected:
unsigned char tccra_val; //!< register value TCCRA
unsigned char tccrb_val; //!< register value TCCRB
@@ -490,8 +529,8 @@ class HWTimer16_1C: public HWTimer16 {
unsigned char Get_TCCRB() { return tccrb_val; }
public:
- IOReg tccra_reg; //!< control register A
- IOReg tccrb_reg; //!< control register B
+ IOReg tccra_reg; //!< control register A
+ IOReg tccrb_reg; //!< control register B
HWTimer16_1C(AvrDevice *core,
PrescalerMultiplexer *p,
@@ -534,6 +573,11 @@ class HWTimer16_2C2: public HWTimer16 {
//! Handle special WGM setting, translate wgm raw value to wgm value
void Set_WGM(int val);
+#ifndef SWIG
+ IOREG_SETGET_UCHAR(HWTimer16_2C2, _TCCRA)
+ IOREG_SETGET_UCHAR(HWTimer16_2C2, _TCCRB)
+#endif
+
protected:
unsigned char tccra_val; //!< register value TCCRA
unsigned char tccrb_val; //!< register value TCCRB
@@ -549,8 +593,8 @@ class HWTimer16_2C2: public HWTimer16 {
unsigned char Get_TCCRB() { return tccrb_val; }
public:
- IOReg tccra_reg; //!< control register A
- IOReg tccrb_reg; //!< control register B
+ IOReg tccra_reg; //!< control register A
+ IOReg tccrb_reg; //!< control register B
HWTimer16_2C2(AvrDevice *core,
PrescalerMultiplexer *p,
@@ -592,6 +636,13 @@ class HWTimer16_2C2: public HWTimer16 {
+-----+-----+---+---+---+---+---+---+ \endverbatim */
class HWTimer16_2C3: public HWTimer16 {
+ private:
+#ifndef SWIG
+ IOREG_SETGET_UCHAR(HWTimer16_2C3, _TCCRA)
+ IOREG_SETGET_UCHAR(HWTimer16_2C3, _TCCRB)
+ IOREG_SETGET_UCHAR(HWTimer16_2C3, _TCCRC)
+#endif
+
protected:
unsigned char tccra_val; //!< register value TCCRA
unsigned char tccrb_val; //!< register value TCCRB
@@ -610,11 +661,11 @@ class HWTimer16_2C3: public HWTimer16 {
void Set_TCCRC(unsigned char val);
//! Register access to read control register C
unsigned char Get_TCCRC() { return 0; } // will be read allways 0!
-
+
public:
- IOReg tccra_reg; //!< control register A
- IOReg tccrb_reg; //!< control register B
- IOReg tccrc_reg; //!< control register C
+ IOReg tccra_reg; //!< control register A
+ IOReg tccrb_reg; //!< control register B
+ IOReg tccrc_reg; //!< control register C
HWTimer16_2C3(AvrDevice *core,
PrescalerMultiplexer *p,
@@ -655,6 +706,13 @@ class HWTimer16_2C3: public HWTimer16 {
+-----+-----+-----+---+---+---+---+---+ \endverbatim */
class HWTimer16_3C: public HWTimer16 {
+ private:
+#ifndef SWIG
+ IOREG_SETGET_UCHAR(HWTimer16_3C, _TCCRA)
+ IOREG_SETGET_UCHAR(HWTimer16_3C, _TCCRB)
+ IOREG_SETGET_UCHAR(HWTimer16_3C, _TCCRC)
+#endif
+
protected:
unsigned char tccra_val; //!< register value TCCRA
unsigned char tccrb_val; //!< register value TCCRB
@@ -673,11 +731,11 @@ class HWTimer16_3C: public HWTimer16 {
void Set_TCCRC(unsigned char val);
//! Register access to read control register C
unsigned char Get_TCCRC() { return 0; } // will be read allways 0!
-
+
public:
- IOReg tccra_reg; //!< control register A
- IOReg tccrb_reg; //!< control register B
- IOReg tccrc_reg; //!< control register C
+ IOReg tccra_reg; //!< control register A
+ IOReg tccrb_reg; //!< control register B
+ IOReg tccrc_reg; //!< control register C
HWTimer16_3C(AvrDevice *core,
PrescalerMultiplexer *p,
@@ -835,6 +893,18 @@ class HWTimerTinyX5: public Hardware,
bool asyncClock_plllock; //!< pll frequency is locked
SystemClockOffset asyncClock_locktime; //!< time, when pll is locked
+ private:
+#ifndef SWIG
+ IOREG_SETGET_UCHAR(HWTimerTinyX5, _TCNT)
+ IOREG_SETGET_UCHAR(HWTimerTinyX5, _TCCR)
+ IOREG_SETGET_UCHAR(HWTimerTinyX5, _OCRA)
+ IOREG_SETGET_UCHAR(HWTimerTinyX5, _OCRB)
+ IOREG_SETGET_UCHAR(HWTimerTinyX5, _OCRC)
+ IOREG_SETGET_UCHAR(HWTimerTinyX5, _DTPS1)
+ IOREG_SETGET_UCHAR(HWTimerTinyX5, _DT1A)
+ IOREG_SETGET_UCHAR(HWTimerTinyX5, _DT1B)
+#endif
+
protected:
AvrDevice *core; //!< pointer to device core
IOSpecialReg* gtccrRegister; //!< instance of GTCCR register
@@ -910,14 +980,14 @@ class HWTimerTinyX5: public Hardware,
void TransferOutputValues(void);
public:
- IOReg tccr_reg; //!< control register
- IOReg tcnt_reg; //!< counter register
- IOReg tocra_reg; //!< OCR register channel A
- IOReg tocrb_reg; //!< OCR register channel B
- IOReg tocrc_reg; //!< OCR register channel C
- IOReg dtps1_reg; //!< dead time generator prescaler register
- IOReg dt1a_reg; //!< dead time generator register channel A
- IOReg dt1b_reg; //!< dead time generator register channel B
+ IOReg tccr_reg; //!< control register
+ IOReg tcnt_reg; //!< counter register
+ IOReg tocra_reg; //!< OCR register channel A
+ IOReg tocrb_reg; //!< OCR register channel B
+ IOReg tocrc_reg; //!< OCR register channel C
+ IOReg dtps1_reg; //!< dead time generator prescaler register
+ IOReg dt1a_reg; //!< dead time generator register channel A
+ IOReg dt1b_reg; //!< dead time generator register channel B
HWTimerTinyX5(AvrDevice *core,
IOSpecialReg *gtccr,
diff --git a/src/hwuart.h b/src/hwuart.h
index 2ce2674..df5348f 100644
--- a/src/hwuart.h
+++ b/src/hwuart.h
@@ -102,6 +102,14 @@ class HWUart: public Hardware, public TraceValueRegister {
unsigned char txDataTmp;
int txBitCnt;
+#ifndef SWIG
+ IOREG_SETGET_UCHAR(HWUart, Udr)
+ IOREG_SETGET_UCHAR(HWUart, Usr)
+ IOREG_SETGET_UCHAR(HWUart, Ucr)
+ IOREG_SETGET_UCHAR(HWUart, Ubrr)
+ IOREG_SETGET_UCHAR(HWUart, Ubrrhi)
+#endif
+
public:
//! Creates a instance of HWUart class
HWUart(AvrDevice *core,
@@ -132,7 +140,7 @@ class HWUart: public Hardware, public TraceValueRegister {
void CheckForNewSetIrq(unsigned char);
void CheckForNewClearIrq(unsigned char);
- IOReg
+ IOReg
udr_reg,
usr_reg,
ucr_reg,
@@ -148,6 +156,12 @@ class HWUart: public Hardware, public TraceValueRegister {
//! Implements the I/O hardware necessary to do USART transfers.
class HWUsart: public HWUart {
+ private:
+#ifndef SWIG
+ IOREG_SETGET_UCHAR(HWUsart, Ucsrc)
+ IOREG_SETGET_UCHAR(HWUsart, UcsrcUbrrh)
+#endif
+
protected:
PinAtPort pinXck; //!< Clock pin for synchronous mode
@@ -170,9 +184,9 @@ class HWUsart: public HWUart {
unsigned char GetUcsrc();
unsigned char GetUcsrcUbrrh();
- IOReg ucsrc_reg,
- ubrrh_reg,
- ucsrc_ubrrh_reg;
+ IOReg ucsrc_reg,
+ ubrrh_reg,
+ ucsrc_ubrrh_reg;
};
#endif
diff --git a/src/hwusi.h b/src/hwusi.h
index b8c5573..5d64d8c 100644
--- a/src/hwusi.h
+++ b/src/hwusi.h
@@ -118,6 +118,12 @@ class HWUSI: public Hardware, public SimulationMember, public TraceValueRegister
/*! flag for save, which output state is to change */
bool is_DI_change;
+#ifndef SWIG
+ IOREG_SETGET_UCHAR(HWUSI, USIDR)
+ IOREG_SETGET_UCHAR(HWUSI, USISR)
+ IOREG_SETGET_UCHAR(HWUSI, USICR)
+#endif
+
protected:
/*! interface to store data to buffer register */
virtual void setDataBuffer(unsigned char data) { }
@@ -165,11 +171,11 @@ class HWUSI: public Hardware, public SimulationMember, public TraceValueRegister
unsigned char GetUSIDR(void) { return shift_data; }
unsigned char GetUSISR(void);
unsigned char GetUSICR(void) { return control_data; }
-
+
/* IO registers connected with USI */
- IOReg usidr_reg,
- usisr_reg,
- usicr_reg;
+ IOReg usidr_reg,
+ usisr_reg,
+ usicr_reg;
};
class HWUSI_BR: public HWUSI {
@@ -178,6 +184,10 @@ class HWUSI_BR: public HWUSI {
/*! USI buffer register */
unsigned char buffer_data;
+#ifndef SWIG
+ IOREG_SETGET_UCHAR(HWUSI_BR, USIBR)
+#endif
+
protected:
/*! interface to store data to buffer register */
virtual void setDataBuffer(unsigned char data);
@@ -200,7 +210,7 @@ class HWUSI_BR: public HWUSI {
unsigned char GetUSIBR(void) { return buffer_data; }
/* IO registers connected with USI */
- IOReg usibr_reg;
+ IOReg usibr_reg;
};
#endif
diff --git a/src/hwwado.h b/src/hwwado.h
index 8f7a170..944a8e7 100644
--- a/src/hwwado.h
+++ b/src/hwwado.h
@@ -36,6 +36,11 @@ class HWIrqSystem;
/** Watchdog (WDT) peripheral. Interrupts are not implemented. */
class HWWado: public Hardware, public TraceValueRegister {
+ private:
+#ifndef SWIG
+ IOREG_SETGET_UCHAR(HWWado, Wdtcr)
+#endif
+
protected:
unsigned char wdtcr;
unsigned char cntWde; //4 cycles counter for unsetting the wde
@@ -51,7 +56,7 @@ class HWWado: public Hardware, public TraceValueRegister {
void Wdr(); //reset the wado counter
void Reset();
- IOReg wdtcr_reg;
+ IOReg wdtcr_reg;
};
diff --git a/src/ioregs.h b/src/ioregs.h
index d684765..537b6a0 100644
--- a/src/ioregs.h
+++ b/src/ioregs.h
@@ -36,13 +36,17 @@ class AddressExtensionRegister: public Hardware, public TraceValueRegister {
unsigned char reg_val;
unsigned char reg_mask;
+#ifndef SWIG
+ IOREG_SETGET_UCHAR(AddressExtensionRegister, RegVal)
+#endif
+
public:
AddressExtensionRegister(AvrDevice *core, const std::string ®name, unsigned bitsize);
void Reset() { reg_val = 0; }
unsigned char GetRegVal() { return reg_val; }
void SetRegVal(unsigned char val) { reg_val = val & reg_mask; }
- IOReg ext_reg;
+ IOReg ext_reg;
};
#endif
diff --git a/src/pin.h b/src/pin.h
index 26ff637..24070e6 100644
--- a/src/pin.h
+++ b/src/pin.h
@@ -32,7 +32,7 @@
class Net;
class HWPort;
-template class IOReg;
+class IOReg;
#define REL_FLOATING_POTENTIAL 0.55
@@ -99,7 +99,7 @@ class Pin {
protected:
unsigned char *pinOfPort; //!< points to HWPort::pin or NULL
- IOReg *pinregOfPort;
+ IOReg *pinregOfPort;
unsigned char mask; //!< byte mask for HWPort::pin
AnalogValue analogVal; //!< "real" analog voltage value
diff --git a/src/pinatport.cpp b/src/pinatport.cpp
index d7a121a..a7a51f9 100644
--- a/src/pinatport.cpp
+++ b/src/pinatport.cpp
@@ -34,7 +34,7 @@ PinAtPort::PinAtPort( HWPort *p, unsigned char pn)
}
Pin& PinAtPort::GetPin() {
- return port->GetPin(pinNo);
+ return port->GetPhysPin(pinNo);
}
void PinAtPort::SetPort(bool val) {
diff --git a/src/rwmem.h b/src/rwmem.h
index c948d7a..3168d2b 100644
--- a/src/rwmem.h
+++ b/src/rwmem.h
@@ -224,22 +224,34 @@ class NotSimulatedRegister : public RWMemoryMember {
void set(unsigned char);
};
+//! helper for IOReg static callback wrappers
+#define IOREG_SET_UCHAR(cls, reg) \
+ static void Set##reg(void *this_ptr, unsigned char val) \
+ { static_cast(this_ptr)->Set##reg(val); }
+
+#define IOREG_GET_UCHAR(cls, reg) \
+ static unsigned char Get##reg(void *this_ptr) \
+ { return static_cast(this_ptr)->Get##reg(); }
+
+#define IOREG_SETGET_UCHAR(cls, reg) \
+ IOREG_SET_UCHAR(cls, reg) \
+ IOREG_GET_UCHAR(cls, reg)
+
//! IO register to be specialized for a certain class/hardware
-/*! The template parameter class P specifies the class type in which
- the io register resides. */
-template
+//! The class accepts static member function pointers of the owner/parent of
+//! the IO register.
class IOReg: public RWMemoryMember {
public:
- typedef unsigned char(P::*getter_t)();
- typedef void (P::*setter_t)(unsigned char);
+ typedef unsigned char(*getter_t)(void*);
+ typedef void (*setter_t)(void*, unsigned char);
/*! Creates an IO control register for controlling hardware units
\param _p: pointer to object this will be part of
\param _g: pointer to get method
\param _s: pointer to set method */
IOReg(TraceValueRegister *registry,
const std::string &tracename,
- P *_p,
+ void *_p,
getter_t _g=0,
setter_t _s=0):
RWMemoryMember(registry, tracename),
@@ -267,7 +279,7 @@ class IOReg: public RWMemoryMember {
protected:
unsigned char get() const {
if (g)
- return (p->*g)();
+ return g(p);
else if (tv) {
avr_warning("Reading of '%s' is not supported.", tv->name().c_str());
}
@@ -275,14 +287,14 @@ class IOReg: public RWMemoryMember {
}
void set(unsigned char val) {
if (s)
- (p->*s)(val);
+ s(p, val);
else if (tv) {
avr_warning("Writing of '%s' (with %d) is not supported.", tv->name().c_str(), val);
}
}
private:
- P *p;
+ void *p;
getter_t g;
setter_t s;
};
--
2.1.4