swarm-modeling
[Top][All Lists]
Advanced

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

Re: [Swarm-Modelling] ABMs on Graphical Processor Units


From: Steven H. Rogers
Subject: Re: [Swarm-Modelling] ABMs on Graphical Processor Units
Date: Fri, 28 Dec 2007 21:31:21 -0700
User-agent: Thunderbird 1.5.0.10 (X11/20070302)

Russell Standish wrote:
It sounds to me that the Cell is basically equivalent to a 9 core
conventional SMP setup, with "local memory" being essentially the same
as the L2 cache. 256KB is a little on the measely side these days, as
even commodity IA can stump up a couple MB of cache, but its certainly
possible to be used, as pevious generations of IA only had this much
cache. Then it doesn't matter if MPI is kept in local store - only the
bits of the program heavily used will matter, and typically MPI is at
its most successful when communication costs are much less than
computation costs.
The Cell is not SMP at all. It's really asymmetrical and MPI is unlikely to be a good fit. One of the SPUs may be reserved for OS use. IIRC, each SPU has an MMU to coordinate DMA transfers between local and shared memory, so data can be streamed in and out efficiently. The SPUs shouldn't need to keep much data local for workloads that can be structured to take advantage of this.

# Steve



reply via email to

[Prev in Thread] Current Thread [Next in Thread]