[Viuavm-commits] [SCM] Viua VM branch issue/1675dafd/force-using-explicit-register-set-names updated. v0.9.0-1479-ga74e207

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- Log -----------------------------------------------------------------
commit a74e207b67367b8afb01c091e51f4b87e2fded5f
Author: Marek Marecki <address@hidden>
Date:   Fri Mar 30 15:26:04 2018 +0200

    Explicit register sets for integer samples

-----------------------------------------------------------------------

Summary of changes:
 sample/asm/int/add.asm                  | 12 ++++++------
 sample/asm/int/add_with_rreferences.asm | 10 +++++-----
 sample/asm/int/boolean_as_int.asm       | 12 ++++++++----
 sample/asm/int/dec.asm                  |  8 +++-----
 sample/asm/int/div.asm                  | 10 ++++------
 sample/asm/int/eq.asm                   | 11 ++++-------
 sample/asm/int/gt.asm                   | 11 ++++-------
 sample/asm/int/gte.asm                  | 11 ++++-------
 sample/asm/int/in_condition.asm         | 17 +++++++----------
 sample/asm/int/inc.asm                  |  8 +++-----
 sample/asm/int/istore_default.asm       | 25 -------------------------
 sample/asm/int/lt.asm                   | 11 ++++-------
 sample/asm/int/lte.asm                  | 11 ++++-------
 sample/asm/int/modulo.asm               | 18 +++++++++---------
 sample/asm/int/mul.asm                  | 14 ++++++--------
 sample/asm/int/sub.asm                  | 10 ++++------
 tests/tests.py                          |  3 ---
 17 files changed, 75 insertions(+), 127 deletions(-)
 delete mode 100644 sample/asm/int/istore_default.asm


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