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[avr-libc-commit] [2435] Add SVN properties where missing.
|
From: |
Joerg Wunsch |
|
Subject: |
[avr-libc-commit] [2435] Add SVN properties where missing. |
|
Date: |
Mon, 11 Aug 2014 10:31:54 +0000 |
Revision: 2435
http://svn.sv.gnu.org/viewvc/?view=rev&root=avr-libc&revision=2435
Author: joerg_wunsch
Date: 2014-08-11 10:31:52 +0000 (Mon, 11 Aug 2014)
Log Message:
-----------
Add SVN properties where missing.
Modified Paths:
--------------
trunk/avr-libc/crt1/iosym/at90pwm161.S
trunk/avr-libc/crt1/iosym/ata5272.S
trunk/avr-libc/crt1/iosym/ata5505.S
trunk/avr-libc/crt1/iosym/ata5790.S
trunk/avr-libc/crt1/iosym/ata5795.S
trunk/avr-libc/crt1/iosym/ata6285.S
trunk/avr-libc/crt1/iosym/ata6286.S
trunk/avr-libc/crt1/iosym/atmega1284.S
trunk/avr-libc/crt1/iosym/atmega128a.S
trunk/avr-libc/crt1/iosym/atmega164pa.S
trunk/avr-libc/crt1/iosym/atmega165pa.S
trunk/avr-libc/crt1/iosym/atmega168pa.S
trunk/avr-libc/crt1/iosym/atmega3250pa.S
trunk/avr-libc/crt1/iosym/atmega325pa.S
trunk/avr-libc/crt1/iosym/atmega3290pa.S
trunk/avr-libc/crt1/iosym/atmega32a.S
trunk/avr-libc/crt1/iosym/atmega48pa.S
trunk/avr-libc/crt1/iosym/atmega64a.S
trunk/avr-libc/crt1/iosym/atmega8a.S
trunk/avr-libc/crt1/iosym/attiny1634.S
trunk/avr-libc/crt1/iosym/attiny828.S
trunk/avr-libc/crt1/iosym/atxmega128a3u.S
trunk/avr-libc/crt1/iosym/atxmega128a4u.S
trunk/avr-libc/crt1/iosym/atxmega128b1.S
trunk/avr-libc/crt1/iosym/atxmega128b3.S
trunk/avr-libc/crt1/iosym/atxmega128c3.S
trunk/avr-libc/crt1/iosym/atxmega128d4.S
trunk/avr-libc/crt1/iosym/atxmega16a4u.S
trunk/avr-libc/crt1/iosym/atxmega16c4.S
trunk/avr-libc/crt1/iosym/atxmega192a3u.S
trunk/avr-libc/crt1/iosym/atxmega192c3.S
trunk/avr-libc/crt1/iosym/atxmega256a3bu.S
trunk/avr-libc/crt1/iosym/atxmega256a3u.S
trunk/avr-libc/crt1/iosym/atxmega256c3.S
trunk/avr-libc/crt1/iosym/atxmega32a4u.S
trunk/avr-libc/crt1/iosym/atxmega32c4.S
trunk/avr-libc/crt1/iosym/atxmega384c3.S
trunk/avr-libc/crt1/iosym/atxmega384d3.S
trunk/avr-libc/crt1/iosym/atxmega64a3u.S
trunk/avr-libc/crt1/iosym/atxmega64a4u.S
trunk/avr-libc/crt1/iosym/atxmega64b1.S
trunk/avr-libc/crt1/iosym/atxmega64b3.S
trunk/avr-libc/crt1/iosym/atxmega64c3.S
trunk/avr-libc/crt1/iosym/atxmega64d4.S
trunk/avr-libc/include/avr/io90pwm161.h
trunk/avr-libc/include/avr/ioa5272.h
trunk/avr-libc/include/avr/ioa5505.h
trunk/avr-libc/include/avr/ioa5790.h
trunk/avr-libc/include/avr/ioa5795.h
trunk/avr-libc/include/avr/ioa6285.h
trunk/avr-libc/include/avr/ioa6286.h
trunk/avr-libc/include/avr/iom1284.h
trunk/avr-libc/include/avr/iom128a.h
trunk/avr-libc/include/avr/iom164pa.h
trunk/avr-libc/include/avr/iom165pa.h
trunk/avr-libc/include/avr/iom168pa.h
trunk/avr-libc/include/avr/iom16hvbrevb.h
trunk/avr-libc/include/avr/iom3250pa.h
trunk/avr-libc/include/avr/iom325pa.h
trunk/avr-libc/include/avr/iom3290pa.h
trunk/avr-libc/include/avr/iom32a.h
trunk/avr-libc/include/avr/iom32hvbrevb.h
trunk/avr-libc/include/avr/iom48pa.h
trunk/avr-libc/include/avr/iom64a.h
trunk/avr-libc/include/avr/iom8a.h
trunk/avr-libc/include/avr/iotn1634.h
trunk/avr-libc/include/avr/iotn828.h
trunk/avr-libc/include/avr/iox128a3u.h
trunk/avr-libc/include/avr/iox128a4u.h
trunk/avr-libc/include/avr/iox128b1.h
trunk/avr-libc/include/avr/iox128b3.h
trunk/avr-libc/include/avr/iox128c3.h
trunk/avr-libc/include/avr/iox128d4.h
trunk/avr-libc/include/avr/iox16a4u.h
trunk/avr-libc/include/avr/iox16c4.h
trunk/avr-libc/include/avr/iox192a3u.h
trunk/avr-libc/include/avr/iox192c3.h
trunk/avr-libc/include/avr/iox256a3bu.h
trunk/avr-libc/include/avr/iox256a3u.h
trunk/avr-libc/include/avr/iox256c3.h
trunk/avr-libc/include/avr/iox32a4u.h
trunk/avr-libc/include/avr/iox32c4.h
trunk/avr-libc/include/avr/iox384c3.h
trunk/avr-libc/include/avr/iox384d3.h
trunk/avr-libc/include/avr/iox64a3u.h
trunk/avr-libc/include/avr/iox64a4u.h
trunk/avr-libc/include/avr/iox64b1.h
trunk/avr-libc/include/avr/iox64b3.h
trunk/avr-libc/include/avr/iox64c3.h
trunk/avr-libc/include/avr/iox64d4.h
Property Changed:
----------------
trunk/avr-libc/crt1/iosym/at90pwm161.S
trunk/avr-libc/crt1/iosym/ata5272.S
trunk/avr-libc/crt1/iosym/ata5505.S
trunk/avr-libc/crt1/iosym/ata5790.S
trunk/avr-libc/crt1/iosym/ata5795.S
trunk/avr-libc/crt1/iosym/ata6285.S
trunk/avr-libc/crt1/iosym/ata6286.S
trunk/avr-libc/crt1/iosym/atmega1284.S
trunk/avr-libc/crt1/iosym/atmega128a.S
trunk/avr-libc/crt1/iosym/atmega164pa.S
trunk/avr-libc/crt1/iosym/atmega165pa.S
trunk/avr-libc/crt1/iosym/atmega168pa.S
trunk/avr-libc/crt1/iosym/atmega3250pa.S
trunk/avr-libc/crt1/iosym/atmega325pa.S
trunk/avr-libc/crt1/iosym/atmega3290pa.S
trunk/avr-libc/crt1/iosym/atmega32a.S
trunk/avr-libc/crt1/iosym/atmega48pa.S
trunk/avr-libc/crt1/iosym/atmega64a.S
trunk/avr-libc/crt1/iosym/atmega8a.S
trunk/avr-libc/crt1/iosym/attiny1634.S
trunk/avr-libc/crt1/iosym/attiny828.S
trunk/avr-libc/crt1/iosym/atxmega128a3u.S
trunk/avr-libc/crt1/iosym/atxmega128a4u.S
trunk/avr-libc/crt1/iosym/atxmega128b1.S
trunk/avr-libc/crt1/iosym/atxmega128b3.S
trunk/avr-libc/crt1/iosym/atxmega128c3.S
trunk/avr-libc/crt1/iosym/atxmega128d4.S
trunk/avr-libc/crt1/iosym/atxmega16a4u.S
trunk/avr-libc/crt1/iosym/atxmega16c4.S
trunk/avr-libc/crt1/iosym/atxmega192a3u.S
trunk/avr-libc/crt1/iosym/atxmega192c3.S
trunk/avr-libc/crt1/iosym/atxmega256a3bu.S
trunk/avr-libc/crt1/iosym/atxmega256a3u.S
trunk/avr-libc/crt1/iosym/atxmega256c3.S
trunk/avr-libc/crt1/iosym/atxmega32a4u.S
trunk/avr-libc/crt1/iosym/atxmega32c4.S
trunk/avr-libc/crt1/iosym/atxmega384c3.S
trunk/avr-libc/crt1/iosym/atxmega384d3.S
trunk/avr-libc/crt1/iosym/atxmega64a3u.S
trunk/avr-libc/crt1/iosym/atxmega64a4u.S
trunk/avr-libc/crt1/iosym/atxmega64b1.S
trunk/avr-libc/crt1/iosym/atxmega64b3.S
trunk/avr-libc/crt1/iosym/atxmega64c3.S
trunk/avr-libc/crt1/iosym/atxmega64d4.S
trunk/avr-libc/include/avr/io90pwm161.h
trunk/avr-libc/include/avr/ioa5272.h
trunk/avr-libc/include/avr/ioa5505.h
trunk/avr-libc/include/avr/ioa5790.h
trunk/avr-libc/include/avr/ioa5795.h
trunk/avr-libc/include/avr/ioa6285.h
trunk/avr-libc/include/avr/ioa6286.h
trunk/avr-libc/include/avr/iom1284.h
trunk/avr-libc/include/avr/iom128a.h
trunk/avr-libc/include/avr/iom164pa.h
trunk/avr-libc/include/avr/iom165pa.h
trunk/avr-libc/include/avr/iom168pa.h
trunk/avr-libc/include/avr/iom16hvbrevb.h
trunk/avr-libc/include/avr/iom3000.h
trunk/avr-libc/include/avr/iom3250pa.h
trunk/avr-libc/include/avr/iom325pa.h
trunk/avr-libc/include/avr/iom3290pa.h
trunk/avr-libc/include/avr/iom32a.h
trunk/avr-libc/include/avr/iom32hvbrevb.h
trunk/avr-libc/include/avr/iom48pa.h
trunk/avr-libc/include/avr/iom64a.h
trunk/avr-libc/include/avr/iom8a.h
trunk/avr-libc/include/avr/iotn1634.h
trunk/avr-libc/include/avr/iotn20.h
trunk/avr-libc/include/avr/iotn40.h
trunk/avr-libc/include/avr/iotn828.h
trunk/avr-libc/include/avr/iotn84a.h
trunk/avr-libc/include/avr/iox128a3u.h
trunk/avr-libc/include/avr/iox128a4u.h
trunk/avr-libc/include/avr/iox128b1.h
trunk/avr-libc/include/avr/iox128b3.h
trunk/avr-libc/include/avr/iox128c3.h
trunk/avr-libc/include/avr/iox128d4.h
trunk/avr-libc/include/avr/iox16a4u.h
trunk/avr-libc/include/avr/iox16c4.h
trunk/avr-libc/include/avr/iox192a3u.h
trunk/avr-libc/include/avr/iox192c3.h
trunk/avr-libc/include/avr/iox256a3bu.h
trunk/avr-libc/include/avr/iox256a3u.h
trunk/avr-libc/include/avr/iox256c3.h
trunk/avr-libc/include/avr/iox32a4u.h
trunk/avr-libc/include/avr/iox32c4.h
trunk/avr-libc/include/avr/iox384c3.h
trunk/avr-libc/include/avr/iox384d3.h
trunk/avr-libc/include/avr/iox64a1u.h
trunk/avr-libc/include/avr/iox64a3u.h
trunk/avr-libc/include/avr/iox64a4u.h
trunk/avr-libc/include/avr/iox64b1.h
trunk/avr-libc/include/avr/iox64b3.h
trunk/avr-libc/include/avr/iox64c3.h
trunk/avr-libc/include/avr/iox64d4.h
Modified: trunk/avr-libc/crt1/iosym/at90pwm161.S
===================================================================
--- trunk/avr-libc/crt1/iosym/at90pwm161.S 2014-08-05 06:57:11 UTC (rev
2434)
+++ trunk/avr-libc/crt1/iosym/at90pwm161.S 2014-08-11 10:31:52 UTC (rev
2435)
@@ -30,7 +30,7 @@
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
POSSIBILITY OF SUCH DAMAGE. */
-/* $Id: ioreg.pl 2376 2013-04-30 14:49:25Z joerg_wunsch $ */
+/* $Id$ */
#include <avr/version.h>
Property changes on: trunk/avr-libc/crt1/iosym/at90pwm161.S
___________________________________________________________________
Added: svn:mime-type
+ text/plain
Added: svn:keywords
+ Author Rev Date URL Id
Added: svn:eol-style
+ native
Modified: trunk/avr-libc/crt1/iosym/ata5272.S
===================================================================
--- trunk/avr-libc/crt1/iosym/ata5272.S 2014-08-05 06:57:11 UTC (rev 2434)
+++ trunk/avr-libc/crt1/iosym/ata5272.S 2014-08-11 10:31:52 UTC (rev 2435)
@@ -30,7 +30,7 @@
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
POSSIBILITY OF SUCH DAMAGE. */
-/* $Id: ioreg.pl 2376 2013-04-30 14:49:25Z joerg_wunsch $ */
+/* $Id$ */
#include <avr/version.h>
Property changes on: trunk/avr-libc/crt1/iosym/ata5272.S
___________________________________________________________________
Added: svn:mime-type
+ text/plain
Added: svn:keywords
+ Author Rev Date URL Id
Added: svn:eol-style
+ native
Modified: trunk/avr-libc/crt1/iosym/ata5505.S
===================================================================
--- trunk/avr-libc/crt1/iosym/ata5505.S 2014-08-05 06:57:11 UTC (rev 2434)
+++ trunk/avr-libc/crt1/iosym/ata5505.S 2014-08-11 10:31:52 UTC (rev 2435)
@@ -30,7 +30,7 @@
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
POSSIBILITY OF SUCH DAMAGE. */
-/* $Id: ioreg.pl 2376 2013-04-30 14:49:25Z joerg_wunsch $ */
+/* $Id$ */
#include <avr/version.h>
Property changes on: trunk/avr-libc/crt1/iosym/ata5505.S
___________________________________________________________________
Added: svn:mime-type
+ text/plain
Added: svn:keywords
+ Author Rev Date URL Id
Added: svn:eol-style
+ native
Modified: trunk/avr-libc/crt1/iosym/ata5790.S
===================================================================
--- trunk/avr-libc/crt1/iosym/ata5790.S 2014-08-05 06:57:11 UTC (rev 2434)
+++ trunk/avr-libc/crt1/iosym/ata5790.S 2014-08-11 10:31:52 UTC (rev 2435)
@@ -30,7 +30,7 @@
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
POSSIBILITY OF SUCH DAMAGE. */
-/* $Id: ioreg.pl 2376 2013-04-30 14:49:25Z joerg_wunsch $ */
+/* $Id$ */
#include <avr/version.h>
Property changes on: trunk/avr-libc/crt1/iosym/ata5790.S
___________________________________________________________________
Added: svn:mime-type
+ text/plain
Added: svn:keywords
+ Author Rev Date URL Id
Added: svn:eol-style
+ native
Modified: trunk/avr-libc/crt1/iosym/ata5795.S
===================================================================
--- trunk/avr-libc/crt1/iosym/ata5795.S 2014-08-05 06:57:11 UTC (rev 2434)
+++ trunk/avr-libc/crt1/iosym/ata5795.S 2014-08-11 10:31:52 UTC (rev 2435)
@@ -30,7 +30,7 @@
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
POSSIBILITY OF SUCH DAMAGE. */
-/* $Id: ioreg.pl 2376 2013-04-30 14:49:25Z joerg_wunsch $ */
+/* $Id$ */
#include <avr/version.h>
Property changes on: trunk/avr-libc/crt1/iosym/ata5795.S
___________________________________________________________________
Added: svn:mime-type
+ text/plain
Added: svn:keywords
+ Author Rev Date URL Id
Added: svn:eol-style
+ native
Modified: trunk/avr-libc/crt1/iosym/ata6285.S
===================================================================
--- trunk/avr-libc/crt1/iosym/ata6285.S 2014-08-05 06:57:11 UTC (rev 2434)
+++ trunk/avr-libc/crt1/iosym/ata6285.S 2014-08-11 10:31:52 UTC (rev 2435)
@@ -30,7 +30,7 @@
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
POSSIBILITY OF SUCH DAMAGE. */
-/* $Id: ioreg.pl 2376 2013-04-30 14:49:25Z joerg_wunsch $ */
+/* $Id$ */
#include <avr/version.h>
Property changes on: trunk/avr-libc/crt1/iosym/ata6285.S
___________________________________________________________________
Added: svn:mime-type
+ text/plain
Added: svn:keywords
+ Author Rev Date URL Id
Added: svn:eol-style
+ native
Modified: trunk/avr-libc/crt1/iosym/ata6286.S
===================================================================
--- trunk/avr-libc/crt1/iosym/ata6286.S 2014-08-05 06:57:11 UTC (rev 2434)
+++ trunk/avr-libc/crt1/iosym/ata6286.S 2014-08-11 10:31:52 UTC (rev 2435)
@@ -30,7 +30,7 @@
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
POSSIBILITY OF SUCH DAMAGE. */
-/* $Id: ioreg.pl 2376 2013-04-30 14:49:25Z joerg_wunsch $ */
+/* $Id$ */
#include <avr/version.h>
Property changes on: trunk/avr-libc/crt1/iosym/ata6286.S
___________________________________________________________________
Added: svn:mime-type
+ text/plain
Added: svn:keywords
+ Author Rev Date URL Id
Added: svn:eol-style
+ native
Modified: trunk/avr-libc/crt1/iosym/atmega1284.S
===================================================================
--- trunk/avr-libc/crt1/iosym/atmega1284.S 2014-08-05 06:57:11 UTC (rev
2434)
+++ trunk/avr-libc/crt1/iosym/atmega1284.S 2014-08-11 10:31:52 UTC (rev
2435)
@@ -30,7 +30,7 @@
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
POSSIBILITY OF SUCH DAMAGE. */
-/* $Id: ioreg.pl 2376 2013-04-30 14:49:25Z joerg_wunsch $ */
+/* $Id$ */
#include <avr/version.h>
Property changes on: trunk/avr-libc/crt1/iosym/atmega1284.S
___________________________________________________________________
Added: svn:mime-type
+ text/plain
Added: svn:keywords
+ Author Rev Date URL Id
Added: svn:eol-style
+ native
Modified: trunk/avr-libc/crt1/iosym/atmega128a.S
===================================================================
--- trunk/avr-libc/crt1/iosym/atmega128a.S 2014-08-05 06:57:11 UTC (rev
2434)
+++ trunk/avr-libc/crt1/iosym/atmega128a.S 2014-08-11 10:31:52 UTC (rev
2435)
@@ -30,7 +30,7 @@
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
POSSIBILITY OF SUCH DAMAGE. */
-/* $Id: ioreg.pl 2376 2013-04-30 14:49:25Z joerg_wunsch $ */
+/* $Id$ */
#include <avr/version.h>
Property changes on: trunk/avr-libc/crt1/iosym/atmega128a.S
___________________________________________________________________
Added: svn:mime-type
+ text/plain
Added: svn:keywords
+ Author Rev Date URL Id
Added: svn:eol-style
+ native
Modified: trunk/avr-libc/crt1/iosym/atmega164pa.S
===================================================================
--- trunk/avr-libc/crt1/iosym/atmega164pa.S 2014-08-05 06:57:11 UTC (rev
2434)
+++ trunk/avr-libc/crt1/iosym/atmega164pa.S 2014-08-11 10:31:52 UTC (rev
2435)
@@ -30,7 +30,7 @@
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
POSSIBILITY OF SUCH DAMAGE. */
-/* $Id: ioreg.pl 2376 2013-04-30 14:49:25Z joerg_wunsch $ */
+/* $Id$ */
#include <avr/version.h>
Property changes on: trunk/avr-libc/crt1/iosym/atmega164pa.S
___________________________________________________________________
Added: svn:mime-type
+ text/plain
Added: svn:keywords
+ Author Rev Date URL Id
Added: svn:eol-style
+ native
Modified: trunk/avr-libc/crt1/iosym/atmega165pa.S
===================================================================
--- trunk/avr-libc/crt1/iosym/atmega165pa.S 2014-08-05 06:57:11 UTC (rev
2434)
+++ trunk/avr-libc/crt1/iosym/atmega165pa.S 2014-08-11 10:31:52 UTC (rev
2435)
@@ -30,7 +30,7 @@
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
POSSIBILITY OF SUCH DAMAGE. */
-/* $Id: ioreg.pl 2376 2013-04-30 14:49:25Z joerg_wunsch $ */
+/* $Id$ */
#include <avr/version.h>
Property changes on: trunk/avr-libc/crt1/iosym/atmega165pa.S
___________________________________________________________________
Added: svn:mime-type
+ text/plain
Added: svn:keywords
+ Author Rev Date URL Id
Added: svn:eol-style
+ native
Modified: trunk/avr-libc/crt1/iosym/atmega168pa.S
===================================================================
--- trunk/avr-libc/crt1/iosym/atmega168pa.S 2014-08-05 06:57:11 UTC (rev
2434)
+++ trunk/avr-libc/crt1/iosym/atmega168pa.S 2014-08-11 10:31:52 UTC (rev
2435)
@@ -30,7 +30,7 @@
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
POSSIBILITY OF SUCH DAMAGE. */
-/* $Id: ioreg.pl 2376 2013-04-30 14:49:25Z joerg_wunsch $ */
+/* $Id$ */
#include <avr/version.h>
Property changes on: trunk/avr-libc/crt1/iosym/atmega168pa.S
___________________________________________________________________
Added: svn:mime-type
+ text/plain
Added: svn:keywords
+ Author Rev Date URL Id
Added: svn:eol-style
+ native
Modified: trunk/avr-libc/crt1/iosym/atmega3250pa.S
===================================================================
--- trunk/avr-libc/crt1/iosym/atmega3250pa.S 2014-08-05 06:57:11 UTC (rev
2434)
+++ trunk/avr-libc/crt1/iosym/atmega3250pa.S 2014-08-11 10:31:52 UTC (rev
2435)
@@ -30,7 +30,7 @@
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
POSSIBILITY OF SUCH DAMAGE. */
-/* $Id: ioreg.pl 2376 2013-04-30 14:49:25Z joerg_wunsch $ */
+/* $Id$ */
#include <avr/version.h>
Property changes on: trunk/avr-libc/crt1/iosym/atmega3250pa.S
___________________________________________________________________
Added: svn:mime-type
+ text/plain
Added: svn:keywords
+ Author Rev Date URL Id
Added: svn:eol-style
+ native
Modified: trunk/avr-libc/crt1/iosym/atmega325pa.S
===================================================================
--- trunk/avr-libc/crt1/iosym/atmega325pa.S 2014-08-05 06:57:11 UTC (rev
2434)
+++ trunk/avr-libc/crt1/iosym/atmega325pa.S 2014-08-11 10:31:52 UTC (rev
2435)
@@ -30,7 +30,7 @@
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
POSSIBILITY OF SUCH DAMAGE. */
-/* $Id: ioreg.pl 2376 2013-04-30 14:49:25Z joerg_wunsch $ */
+/* $Id$ */
#include <avr/version.h>
Property changes on: trunk/avr-libc/crt1/iosym/atmega325pa.S
___________________________________________________________________
Added: svn:mime-type
+ text/plain
Added: svn:keywords
+ Author Rev Date URL Id
Added: svn:eol-style
+ native
Modified: trunk/avr-libc/crt1/iosym/atmega3290pa.S
===================================================================
--- trunk/avr-libc/crt1/iosym/atmega3290pa.S 2014-08-05 06:57:11 UTC (rev
2434)
+++ trunk/avr-libc/crt1/iosym/atmega3290pa.S 2014-08-11 10:31:52 UTC (rev
2435)
@@ -30,7 +30,7 @@
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
POSSIBILITY OF SUCH DAMAGE. */
-/* $Id: ioreg.pl 2376 2013-04-30 14:49:25Z joerg_wunsch $ */
+/* $Id$ */
#include <avr/version.h>
Property changes on: trunk/avr-libc/crt1/iosym/atmega3290pa.S
___________________________________________________________________
Added: svn:mime-type
+ text/plain
Added: svn:keywords
+ Author Rev Date URL Id
Added: svn:eol-style
+ native
Modified: trunk/avr-libc/crt1/iosym/atmega32a.S
===================================================================
--- trunk/avr-libc/crt1/iosym/atmega32a.S 2014-08-05 06:57:11 UTC (rev
2434)
+++ trunk/avr-libc/crt1/iosym/atmega32a.S 2014-08-11 10:31:52 UTC (rev
2435)
@@ -30,7 +30,7 @@
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
POSSIBILITY OF SUCH DAMAGE. */
-/* $Id: ioreg.pl 2376 2013-04-30 14:49:25Z joerg_wunsch $ */
+/* $Id$ */
#include <avr/version.h>
Property changes on: trunk/avr-libc/crt1/iosym/atmega32a.S
___________________________________________________________________
Added: svn:mime-type
+ text/plain
Added: svn:keywords
+ Author Rev Date URL Id
Added: svn:eol-style
+ native
Modified: trunk/avr-libc/crt1/iosym/atmega48pa.S
===================================================================
--- trunk/avr-libc/crt1/iosym/atmega48pa.S 2014-08-05 06:57:11 UTC (rev
2434)
+++ trunk/avr-libc/crt1/iosym/atmega48pa.S 2014-08-11 10:31:52 UTC (rev
2435)
@@ -30,7 +30,7 @@
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
POSSIBILITY OF SUCH DAMAGE. */
-/* $Id: ioreg.pl 2376 2013-04-30 14:49:25Z joerg_wunsch $ */
+/* $Id$ */
#include <avr/version.h>
Property changes on: trunk/avr-libc/crt1/iosym/atmega48pa.S
___________________________________________________________________
Added: svn:mime-type
+ text/plain
Added: svn:keywords
+ Author Rev Date URL Id
Added: svn:eol-style
+ native
Modified: trunk/avr-libc/crt1/iosym/atmega64a.S
===================================================================
--- trunk/avr-libc/crt1/iosym/atmega64a.S 2014-08-05 06:57:11 UTC (rev
2434)
+++ trunk/avr-libc/crt1/iosym/atmega64a.S 2014-08-11 10:31:52 UTC (rev
2435)
@@ -30,7 +30,7 @@
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
POSSIBILITY OF SUCH DAMAGE. */
-/* $Id: ioreg.pl 2376 2013-04-30 14:49:25Z joerg_wunsch $ */
+/* $Id$ */
#include <avr/version.h>
Property changes on: trunk/avr-libc/crt1/iosym/atmega64a.S
___________________________________________________________________
Added: svn:mime-type
+ text/plain
Added: svn:keywords
+ Author Rev Date URL Id
Added: svn:eol-style
+ native
Modified: trunk/avr-libc/crt1/iosym/atmega8a.S
===================================================================
--- trunk/avr-libc/crt1/iosym/atmega8a.S 2014-08-05 06:57:11 UTC (rev
2434)
+++ trunk/avr-libc/crt1/iosym/atmega8a.S 2014-08-11 10:31:52 UTC (rev
2435)
@@ -30,7 +30,7 @@
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
POSSIBILITY OF SUCH DAMAGE. */
-/* $Id: ioreg.pl 2376 2013-04-30 14:49:25Z joerg_wunsch $ */
+/* $Id$ */
#include <avr/version.h>
Property changes on: trunk/avr-libc/crt1/iosym/atmega8a.S
___________________________________________________________________
Added: svn:mime-type
+ text/plain
Added: svn:keywords
+ Author Rev Date URL Id
Added: svn:eol-style
+ native
Modified: trunk/avr-libc/crt1/iosym/attiny1634.S
===================================================================
--- trunk/avr-libc/crt1/iosym/attiny1634.S 2014-08-05 06:57:11 UTC (rev
2434)
+++ trunk/avr-libc/crt1/iosym/attiny1634.S 2014-08-11 10:31:52 UTC (rev
2435)
@@ -30,7 +30,7 @@
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
POSSIBILITY OF SUCH DAMAGE. */
-/* $Id: ioreg.pl 2376 2013-04-30 14:49:25Z joerg_wunsch $ */
+/* $Id$ */
#include <avr/version.h>
Property changes on: trunk/avr-libc/crt1/iosym/attiny1634.S
___________________________________________________________________
Added: svn:mime-type
+ text/plain
Added: svn:keywords
+ Author Rev Date URL Id
Added: svn:eol-style
+ native
Modified: trunk/avr-libc/crt1/iosym/attiny828.S
===================================================================
--- trunk/avr-libc/crt1/iosym/attiny828.S 2014-08-05 06:57:11 UTC (rev
2434)
+++ trunk/avr-libc/crt1/iosym/attiny828.S 2014-08-11 10:31:52 UTC (rev
2435)
@@ -30,7 +30,7 @@
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
POSSIBILITY OF SUCH DAMAGE. */
-/* $Id: ioreg.pl 2376 2013-04-30 14:49:25Z joerg_wunsch $ */
+/* $Id$ */
#include <avr/version.h>
Property changes on: trunk/avr-libc/crt1/iosym/attiny828.S
___________________________________________________________________
Added: svn:mime-type
+ text/plain
Added: svn:keywords
+ Author Rev Date URL Id
Added: svn:eol-style
+ native
Modified: trunk/avr-libc/crt1/iosym/atxmega128a3u.S
===================================================================
--- trunk/avr-libc/crt1/iosym/atxmega128a3u.S 2014-08-05 06:57:11 UTC (rev
2434)
+++ trunk/avr-libc/crt1/iosym/atxmega128a3u.S 2014-08-11 10:31:52 UTC (rev
2435)
@@ -30,7 +30,7 @@
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
POSSIBILITY OF SUCH DAMAGE. */
-/* $Id: ioreg.pl 2376 2013-04-30 14:49:25Z joerg_wunsch $ */
+/* $Id$ */
#include <avr/version.h>
Property changes on: trunk/avr-libc/crt1/iosym/atxmega128a3u.S
___________________________________________________________________
Added: svn:mime-type
+ text/plain
Added: svn:keywords
+ Author Rev Date URL Id
Added: svn:eol-style
+ native
Modified: trunk/avr-libc/crt1/iosym/atxmega128a4u.S
===================================================================
--- trunk/avr-libc/crt1/iosym/atxmega128a4u.S 2014-08-05 06:57:11 UTC (rev
2434)
+++ trunk/avr-libc/crt1/iosym/atxmega128a4u.S 2014-08-11 10:31:52 UTC (rev
2435)
@@ -30,7 +30,7 @@
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
POSSIBILITY OF SUCH DAMAGE. */
-/* $Id: ioreg.pl 2376 2013-04-30 14:49:25Z joerg_wunsch $ */
+/* $Id$ */
#include <avr/version.h>
Property changes on: trunk/avr-libc/crt1/iosym/atxmega128a4u.S
___________________________________________________________________
Added: svn:mime-type
+ text/plain
Added: svn:keywords
+ Author Rev Date URL Id
Added: svn:eol-style
+ native
Modified: trunk/avr-libc/crt1/iosym/atxmega128b1.S
===================================================================
--- trunk/avr-libc/crt1/iosym/atxmega128b1.S 2014-08-05 06:57:11 UTC (rev
2434)
+++ trunk/avr-libc/crt1/iosym/atxmega128b1.S 2014-08-11 10:31:52 UTC (rev
2435)
@@ -30,7 +30,7 @@
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
POSSIBILITY OF SUCH DAMAGE. */
-/* $Id: ioreg.pl 2376 2013-04-30 14:49:25Z joerg_wunsch $ */
+/* $Id$ */
#include <avr/version.h>
Property changes on: trunk/avr-libc/crt1/iosym/atxmega128b1.S
___________________________________________________________________
Added: svn:mime-type
+ text/plain
Added: svn:keywords
+ Author Rev Date URL Id
Added: svn:eol-style
+ native
Modified: trunk/avr-libc/crt1/iosym/atxmega128b3.S
===================================================================
--- trunk/avr-libc/crt1/iosym/atxmega128b3.S 2014-08-05 06:57:11 UTC (rev
2434)
+++ trunk/avr-libc/crt1/iosym/atxmega128b3.S 2014-08-11 10:31:52 UTC (rev
2435)
@@ -30,7 +30,7 @@
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
POSSIBILITY OF SUCH DAMAGE. */
-/* $Id: ioreg.pl 2376 2013-04-30 14:49:25Z joerg_wunsch $ */
+/* $Id$ */
#include <avr/version.h>
Property changes on: trunk/avr-libc/crt1/iosym/atxmega128b3.S
___________________________________________________________________
Added: svn:mime-type
+ text/plain
Added: svn:keywords
+ Author Rev Date URL Id
Added: svn:eol-style
+ native
Modified: trunk/avr-libc/crt1/iosym/atxmega128c3.S
===================================================================
--- trunk/avr-libc/crt1/iosym/atxmega128c3.S 2014-08-05 06:57:11 UTC (rev
2434)
+++ trunk/avr-libc/crt1/iosym/atxmega128c3.S 2014-08-11 10:31:52 UTC (rev
2435)
@@ -30,7 +30,7 @@
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
POSSIBILITY OF SUCH DAMAGE. */
-/* $Id: ioreg.pl 2376 2013-04-30 14:49:25Z joerg_wunsch $ */
+/* $Id$ */
#include <avr/version.h>
Property changes on: trunk/avr-libc/crt1/iosym/atxmega128c3.S
___________________________________________________________________
Added: svn:mime-type
+ text/plain
Added: svn:keywords
+ Author Rev Date URL Id
Added: svn:eol-style
+ native
Modified: trunk/avr-libc/crt1/iosym/atxmega128d4.S
===================================================================
--- trunk/avr-libc/crt1/iosym/atxmega128d4.S 2014-08-05 06:57:11 UTC (rev
2434)
+++ trunk/avr-libc/crt1/iosym/atxmega128d4.S 2014-08-11 10:31:52 UTC (rev
2435)
@@ -30,7 +30,7 @@
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
POSSIBILITY OF SUCH DAMAGE. */
-/* $Id: ioreg.pl 2376 2013-04-30 14:49:25Z joerg_wunsch $ */
+/* $Id$ */
#include <avr/version.h>
Property changes on: trunk/avr-libc/crt1/iosym/atxmega128d4.S
___________________________________________________________________
Added: svn:mime-type
+ text/plain
Added: svn:keywords
+ Author Rev Date URL Id
Added: svn:eol-style
+ native
Modified: trunk/avr-libc/crt1/iosym/atxmega16a4u.S
===================================================================
--- trunk/avr-libc/crt1/iosym/atxmega16a4u.S 2014-08-05 06:57:11 UTC (rev
2434)
+++ trunk/avr-libc/crt1/iosym/atxmega16a4u.S 2014-08-11 10:31:52 UTC (rev
2435)
@@ -30,7 +30,7 @@
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
POSSIBILITY OF SUCH DAMAGE. */
-/* $Id: ioreg.pl 2376 2013-04-30 14:49:25Z joerg_wunsch $ */
+/* $Id$ */
#include <avr/version.h>
Property changes on: trunk/avr-libc/crt1/iosym/atxmega16a4u.S
___________________________________________________________________
Added: svn:mime-type
+ text/plain
Added: svn:keywords
+ Author Rev Date URL Id
Added: svn:eol-style
+ native
Modified: trunk/avr-libc/crt1/iosym/atxmega16c4.S
===================================================================
--- trunk/avr-libc/crt1/iosym/atxmega16c4.S 2014-08-05 06:57:11 UTC (rev
2434)
+++ trunk/avr-libc/crt1/iosym/atxmega16c4.S 2014-08-11 10:31:52 UTC (rev
2435)
@@ -30,7 +30,7 @@
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
POSSIBILITY OF SUCH DAMAGE. */
-/* $Id: ioreg.pl 2376 2013-04-30 14:49:25Z joerg_wunsch $ */
+/* $Id$ */
#include <avr/version.h>
Property changes on: trunk/avr-libc/crt1/iosym/atxmega16c4.S
___________________________________________________________________
Added: svn:mime-type
+ text/plain
Added: svn:keywords
+ Author Rev Date URL Id
Added: svn:eol-style
+ native
Modified: trunk/avr-libc/crt1/iosym/atxmega192a3u.S
===================================================================
--- trunk/avr-libc/crt1/iosym/atxmega192a3u.S 2014-08-05 06:57:11 UTC (rev
2434)
+++ trunk/avr-libc/crt1/iosym/atxmega192a3u.S 2014-08-11 10:31:52 UTC (rev
2435)
@@ -30,7 +30,7 @@
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
POSSIBILITY OF SUCH DAMAGE. */
-/* $Id: ioreg.pl 2376 2013-04-30 14:49:25Z joerg_wunsch $ */
+/* $Id$ */
#include <avr/version.h>
Property changes on: trunk/avr-libc/crt1/iosym/atxmega192a3u.S
___________________________________________________________________
Added: svn:mime-type
+ text/plain
Added: svn:keywords
+ Author Rev Date URL Id
Added: svn:eol-style
+ native
Modified: trunk/avr-libc/crt1/iosym/atxmega192c3.S
===================================================================
--- trunk/avr-libc/crt1/iosym/atxmega192c3.S 2014-08-05 06:57:11 UTC (rev
2434)
+++ trunk/avr-libc/crt1/iosym/atxmega192c3.S 2014-08-11 10:31:52 UTC (rev
2435)
@@ -30,7 +30,7 @@
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
POSSIBILITY OF SUCH DAMAGE. */
-/* $Id: ioreg.pl 2376 2013-04-30 14:49:25Z joerg_wunsch $ */
+/* $Id$ */
#include <avr/version.h>
Property changes on: trunk/avr-libc/crt1/iosym/atxmega192c3.S
___________________________________________________________________
Added: svn:mime-type
+ text/plain
Added: svn:keywords
+ Author Rev Date URL Id
Added: svn:eol-style
+ native
Modified: trunk/avr-libc/crt1/iosym/atxmega256a3bu.S
===================================================================
--- trunk/avr-libc/crt1/iosym/atxmega256a3bu.S 2014-08-05 06:57:11 UTC (rev
2434)
+++ trunk/avr-libc/crt1/iosym/atxmega256a3bu.S 2014-08-11 10:31:52 UTC (rev
2435)
@@ -30,7 +30,7 @@
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
POSSIBILITY OF SUCH DAMAGE. */
-/* $Id: ioreg.pl 2376 2013-04-30 14:49:25Z joerg_wunsch $ */
+/* $Id$ */
#include <avr/version.h>
Property changes on: trunk/avr-libc/crt1/iosym/atxmega256a3bu.S
___________________________________________________________________
Added: svn:mime-type
+ text/plain
Added: svn:keywords
+ Author Rev Date URL Id
Added: svn:eol-style
+ native
Modified: trunk/avr-libc/crt1/iosym/atxmega256a3u.S
===================================================================
--- trunk/avr-libc/crt1/iosym/atxmega256a3u.S 2014-08-05 06:57:11 UTC (rev
2434)
+++ trunk/avr-libc/crt1/iosym/atxmega256a3u.S 2014-08-11 10:31:52 UTC (rev
2435)
@@ -30,7 +30,7 @@
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
POSSIBILITY OF SUCH DAMAGE. */
-/* $Id: ioreg.pl 2376 2013-04-30 14:49:25Z joerg_wunsch $ */
+/* $Id$ */
#include <avr/version.h>
Property changes on: trunk/avr-libc/crt1/iosym/atxmega256a3u.S
___________________________________________________________________
Added: svn:mime-type
+ text/plain
Added: svn:keywords
+ Author Rev Date URL Id
Added: svn:eol-style
+ native
Modified: trunk/avr-libc/crt1/iosym/atxmega256c3.S
===================================================================
--- trunk/avr-libc/crt1/iosym/atxmega256c3.S 2014-08-05 06:57:11 UTC (rev
2434)
+++ trunk/avr-libc/crt1/iosym/atxmega256c3.S 2014-08-11 10:31:52 UTC (rev
2435)
@@ -30,7 +30,7 @@
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
POSSIBILITY OF SUCH DAMAGE. */
-/* $Id: ioreg.pl 2376 2013-04-30 14:49:25Z joerg_wunsch $ */
+/* $Id$ */
#include <avr/version.h>
Property changes on: trunk/avr-libc/crt1/iosym/atxmega256c3.S
___________________________________________________________________
Added: svn:mime-type
+ text/plain
Added: svn:keywords
+ Author Rev Date URL Id
Added: svn:eol-style
+ native
Modified: trunk/avr-libc/crt1/iosym/atxmega32a4u.S
===================================================================
--- trunk/avr-libc/crt1/iosym/atxmega32a4u.S 2014-08-05 06:57:11 UTC (rev
2434)
+++ trunk/avr-libc/crt1/iosym/atxmega32a4u.S 2014-08-11 10:31:52 UTC (rev
2435)
@@ -30,7 +30,7 @@
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
POSSIBILITY OF SUCH DAMAGE. */
-/* $Id: ioreg.pl 2376 2013-04-30 14:49:25Z joerg_wunsch $ */
+/* $Id$ */
#include <avr/version.h>
Property changes on: trunk/avr-libc/crt1/iosym/atxmega32a4u.S
___________________________________________________________________
Added: svn:mime-type
+ text/plain
Added: svn:keywords
+ Author Rev Date URL Id
Added: svn:eol-style
+ native
Modified: trunk/avr-libc/crt1/iosym/atxmega32c4.S
===================================================================
--- trunk/avr-libc/crt1/iosym/atxmega32c4.S 2014-08-05 06:57:11 UTC (rev
2434)
+++ trunk/avr-libc/crt1/iosym/atxmega32c4.S 2014-08-11 10:31:52 UTC (rev
2435)
@@ -30,7 +30,7 @@
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
POSSIBILITY OF SUCH DAMAGE. */
-/* $Id: ioreg.pl 2376 2013-04-30 14:49:25Z joerg_wunsch $ */
+/* $Id$ */
#include <avr/version.h>
Property changes on: trunk/avr-libc/crt1/iosym/atxmega32c4.S
___________________________________________________________________
Added: svn:mime-type
+ text/plain
Added: svn:keywords
+ Author Rev Date URL Id
Added: svn:eol-style
+ native
Modified: trunk/avr-libc/crt1/iosym/atxmega384c3.S
===================================================================
--- trunk/avr-libc/crt1/iosym/atxmega384c3.S 2014-08-05 06:57:11 UTC (rev
2434)
+++ trunk/avr-libc/crt1/iosym/atxmega384c3.S 2014-08-11 10:31:52 UTC (rev
2435)
@@ -30,7 +30,7 @@
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
POSSIBILITY OF SUCH DAMAGE. */
-/* $Id: ioreg.pl 2376 2013-04-30 14:49:25Z joerg_wunsch $ */
+/* $Id$ */
#include <avr/version.h>
Property changes on: trunk/avr-libc/crt1/iosym/atxmega384c3.S
___________________________________________________________________
Added: svn:mime-type
+ text/plain
Added: svn:keywords
+ Author Rev Date URL Id
Added: svn:eol-style
+ native
Modified: trunk/avr-libc/crt1/iosym/atxmega384d3.S
===================================================================
--- trunk/avr-libc/crt1/iosym/atxmega384d3.S 2014-08-05 06:57:11 UTC (rev
2434)
+++ trunk/avr-libc/crt1/iosym/atxmega384d3.S 2014-08-11 10:31:52 UTC (rev
2435)
@@ -30,7 +30,7 @@
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
POSSIBILITY OF SUCH DAMAGE. */
-/* $Id: ioreg.pl 2376 2013-04-30 14:49:25Z joerg_wunsch $ */
+/* $Id$ */
#include <avr/version.h>
Property changes on: trunk/avr-libc/crt1/iosym/atxmega384d3.S
___________________________________________________________________
Added: svn:mime-type
+ text/plain
Added: svn:keywords
+ Author Rev Date URL Id
Added: svn:eol-style
+ native
Modified: trunk/avr-libc/crt1/iosym/atxmega64a3u.S
===================================================================
--- trunk/avr-libc/crt1/iosym/atxmega64a3u.S 2014-08-05 06:57:11 UTC (rev
2434)
+++ trunk/avr-libc/crt1/iosym/atxmega64a3u.S 2014-08-11 10:31:52 UTC (rev
2435)
@@ -30,7 +30,7 @@
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
POSSIBILITY OF SUCH DAMAGE. */
-/* $Id: ioreg.pl 2376 2013-04-30 14:49:25Z joerg_wunsch $ */
+/* $Id$ */
#include <avr/version.h>
Property changes on: trunk/avr-libc/crt1/iosym/atxmega64a3u.S
___________________________________________________________________
Added: svn:mime-type
+ text/plain
Added: svn:keywords
+ Author Rev Date URL Id
Added: svn:eol-style
+ native
Modified: trunk/avr-libc/crt1/iosym/atxmega64a4u.S
===================================================================
--- trunk/avr-libc/crt1/iosym/atxmega64a4u.S 2014-08-05 06:57:11 UTC (rev
2434)
+++ trunk/avr-libc/crt1/iosym/atxmega64a4u.S 2014-08-11 10:31:52 UTC (rev
2435)
@@ -30,7 +30,7 @@
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
POSSIBILITY OF SUCH DAMAGE. */
-/* $Id: ioreg.pl 2376 2013-04-30 14:49:25Z joerg_wunsch $ */
+/* $Id$ */
#include <avr/version.h>
Property changes on: trunk/avr-libc/crt1/iosym/atxmega64a4u.S
___________________________________________________________________
Added: svn:mime-type
+ text/plain
Added: svn:keywords
+ Author Rev Date URL Id
Added: svn:eol-style
+ native
Modified: trunk/avr-libc/crt1/iosym/atxmega64b1.S
===================================================================
--- trunk/avr-libc/crt1/iosym/atxmega64b1.S 2014-08-05 06:57:11 UTC (rev
2434)
+++ trunk/avr-libc/crt1/iosym/atxmega64b1.S 2014-08-11 10:31:52 UTC (rev
2435)
@@ -30,7 +30,7 @@
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
POSSIBILITY OF SUCH DAMAGE. */
-/* $Id: ioreg.pl 2376 2013-04-30 14:49:25Z joerg_wunsch $ */
+/* $Id$ */
#include <avr/version.h>
Property changes on: trunk/avr-libc/crt1/iosym/atxmega64b1.S
___________________________________________________________________
Added: svn:mime-type
+ text/plain
Added: svn:keywords
+ Author Rev Date URL Id
Added: svn:eol-style
+ native
Modified: trunk/avr-libc/crt1/iosym/atxmega64b3.S
===================================================================
--- trunk/avr-libc/crt1/iosym/atxmega64b3.S 2014-08-05 06:57:11 UTC (rev
2434)
+++ trunk/avr-libc/crt1/iosym/atxmega64b3.S 2014-08-11 10:31:52 UTC (rev
2435)
@@ -30,7 +30,7 @@
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
POSSIBILITY OF SUCH DAMAGE. */
-/* $Id: ioreg.pl 2376 2013-04-30 14:49:25Z joerg_wunsch $ */
+/* $Id$ */
#include <avr/version.h>
Property changes on: trunk/avr-libc/crt1/iosym/atxmega64b3.S
___________________________________________________________________
Added: svn:mime-type
+ text/plain
Added: svn:keywords
+ Author Rev Date URL Id
Added: svn:eol-style
+ native
Modified: trunk/avr-libc/crt1/iosym/atxmega64c3.S
===================================================================
--- trunk/avr-libc/crt1/iosym/atxmega64c3.S 2014-08-05 06:57:11 UTC (rev
2434)
+++ trunk/avr-libc/crt1/iosym/atxmega64c3.S 2014-08-11 10:31:52 UTC (rev
2435)
@@ -30,7 +30,7 @@
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
POSSIBILITY OF SUCH DAMAGE. */
-/* $Id: ioreg.pl 2376 2013-04-30 14:49:25Z joerg_wunsch $ */
+/* $Id$ */
#include <avr/version.h>
Property changes on: trunk/avr-libc/crt1/iosym/atxmega64c3.S
___________________________________________________________________
Added: svn:mime-type
+ text/plain
Added: svn:keywords
+ Author Rev Date URL Id
Added: svn:eol-style
+ native
Modified: trunk/avr-libc/crt1/iosym/atxmega64d4.S
===================================================================
--- trunk/avr-libc/crt1/iosym/atxmega64d4.S 2014-08-05 06:57:11 UTC (rev
2434)
+++ trunk/avr-libc/crt1/iosym/atxmega64d4.S 2014-08-11 10:31:52 UTC (rev
2435)
@@ -30,7 +30,7 @@
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
POSSIBILITY OF SUCH DAMAGE. */
-/* $Id: ioreg.pl 2376 2013-04-30 14:49:25Z joerg_wunsch $ */
+/* $Id$ */
#include <avr/version.h>
Property changes on: trunk/avr-libc/crt1/iosym/atxmega64d4.S
___________________________________________________________________
Added: svn:mime-type
+ text/plain
Added: svn:keywords
+ Author Rev Date URL Id
Added: svn:eol-style
+ native
Modified: trunk/avr-libc/include/avr/io90pwm161.h
===================================================================
--- trunk/avr-libc/include/avr/io90pwm161.h 2014-08-05 06:57:11 UTC (rev
2434)
+++ trunk/avr-libc/include/avr/io90pwm161.h 2014-08-11 10:31:52 UTC (rev
2435)
@@ -1,859 +1,859 @@
-/*****************************************************************************
- *
- * Copyright (C) 2014 Atmel Corporation
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *
- * * Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- *
- * * Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- *
- * * Neither the name of the copyright holders nor the names of
- * contributors may be used to endorse or promote products derived
- * from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
- * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- ****************************************************************************/
-
-
-#ifndef _AVR_AT90PWM161_H_INCLUDED
-#define _AVR_AT90PWM161_H_INCLUDED
-
-
-#ifndef _AVR_IO_H_
-# error "Include <avr/io.h> instead of this file."
-#endif
-
-#ifndef _AVR_IOXXX_H_
-# define _AVR_IOXXX_H_ "io90pwm161.h"
-#else
-# error "Attempt to include more than one <avr/ioXXX.h> file."
-#endif
-
-/* Registers and associated bit numbers */
-
-#define ACSR _SFR_IO8(0x00)
-#define AC1O 1
-#define AC2O 2
-#define AC3O 3
-#define AC1IF 5
-#define AC2IF 6
-#define AC3IF 7
-
-#define TIMSK1 _SFR_IO8(0x01)
-#define TOIE1 0
-#define ICIE1 5
-
-#define TIFR1 _SFR_IO8(0x02)
-#define TOV1 0
-#define ICF1 5
-
-#define PINB _SFR_IO8(0x03)
-#define PINB7 7
-#define PINB6 6
-#define PINB5 5
-#define PINB4 4
-#define PINB3 3
-#define PINB2 2
-#define PINB1 1
-#define PINB0 0
-
-#define DDRB _SFR_IO8(0x04)
-#define DDRB7 7
-#define DDRB6 6
-#define DDRB5 5
-#define DDRB4 4
-#define DDRB3 3
-#define DDRB2 2
-#define DDRB1 1
-#define DDRB0 0
-
-#define PORTB _SFR_IO8(0x05)
-#define PORTB7 7
-#define PORTB6 6
-#define PORTB5 5
-#define PORTB4 4
-#define PORTB3 3
-#define PORTB2 2
-#define PORTB1 1
-#define PORTB0 0
-
-#define ADCSRA _SFR_IO8(0x06)
-#define ADPS0 0
-#define ADPS1 1
-#define ADPS2 2
-#define ADIE 3
-#define ADIF 4
-#define ADATE 5
-#define ADSC 6
-#define ADEN 7
-
-#define ADCSRB _SFR_IO8(0x07)
-#define ADTS0 0
-#define ADTS1 1
-#define ADTS2 2
-#define ADTS3 3
-#define ADSSEN 4
-#define ADNCDIS 6
-#define ADHSM 7
-
-#define ADMUX _SFR_IO8(0x08)
-#define MUX0 0
-#define MUX1 1
-#define MUX2 2
-#define MUX3 3
-#define ADLAR 5
-#define REFS0 6
-#define REFS1 7
-
-#define PIND _SFR_IO8(0x09)
-#define PIND7 7
-#define PIND6 6
-#define PIND5 5
-#define PIND4 4
-#define PIND3 3
-#define PIND2 2
-#define PIND1 1
-#define PIND0 0
-
-#define DDRD _SFR_IO8(0x0A)
-#define DDRD7 7
-#define DDRD6 6
-#define DDRD5 5
-#define DDRD4 4
-#define DDRD3 3
-#define DDRD2 2
-#define DDRD1 1
-#define DDRD0 0
-
-#define PORTD _SFR_IO8(0x0B)
-#define PORTD7 7
-#define PORTD6 6
-#define PORTD5 5
-#define PORTD4 4
-#define PORTD3 3
-#define PORTD2 2
-#define PORTD1 1
-#define PORTD0 0
-
-#define PINE _SFR_IO8(0x0C)
-#define PINE2 2
-#define PINE1 1
-#define PINE0 0
-
-#define DDRE _SFR_IO8(0x0D)
-#define DDRE2 2
-#define DDRE1 1
-#define DDRE0 0
-
-#define PORTE _SFR_IO8(0x0E)
-#define PORTE2 2
-#define PORTE1 1
-#define PORTE0 0
-
-#define PIM0 _SFR_IO8(0x0F)
-#define PEOPE0 0
-#define PEOEPE0 1
-#define PEVE0A 3
-#define PEVE0B 4
-
-#define PIFR0 _SFR_IO8(0x10)
-#define PEOP0 0
-#define PRN00 1
-#define PRN01 2
-#define PEV0A 3
-#define PEV0B 4
-#define POAC0A 6
-#define POAC0B 7
-
-#define PCNF0 _SFR_IO8(0x11)
-#define PCLKSEL0 1
-#define POP0 2
-#define PMODE00 3
-#define PMODE01 4
-#define PLOCK0 5
-#define PALOCK0 6
-#define PFIFTY0 7
-
-#define PCTL0 _SFR_IO8(0x12)
-#define PRUN0 0
-#define PCCYC0 1
-#define PAOC0A 3
-#define PAOC0B 4
-#define PBFM00 2
-#define PBFM01 5
-#define PPRE00 6
-#define PPRE01 7
-
-#define PIM2 _SFR_IO8(0x13)
-#define PEOPE2 0
-#define PEOEPE2 1
-#define PEVE2A 3
-#define PEVE2B 4
-#define PSEIE2 5
-
-#define PIFR2 _SFR_IO8(0x14)
-#define PEOP2 0
-#define PRN20 1
-#define PRN21 2
-#define PEV2A 3
-#define PEV2B 4
-#define PSEI2 5
-#define POAC2A 6
-#define POAC2B 7
-
-#define PCNF2 _SFR_IO8(0x15)
-#define POME2 0
-#define PCLKSEL2 1
-#define POP2 2
-#define PMODE20 3
-#define PMODE21 4
-#define PLOCK2 5
-#define PALOCK2 6
-#define PFIFTY2 7
-
-#define PCTL2 _SFR_IO8(0x16)
-#define PRUN2 0
-#define PCCYC2 1
-#define PARUN2 2
-#define PAOC2A 3
-#define PAOC2B 4
-#define PBFM2 5
-#define PPRE20 6
-#define PPRE21 7
-
-#define SPCR _SFR_IO8(0x17)
-#define SPR0 0
-#define SPR1 1
-#define CPHA 2
-#define CPOL 3
-#define MSTR 4
-#define DORD 5
-#define SPE 6
-#define SPIE 7
-
-#define SPSR _SFR_IO8(0x18)
-#define SPI2X 0
-#define WCOL 6
-#define SPIF 7
-
-#define GPIOR0 _SFR_IO8(0x19)
-#define GPIOR00 0
-#define GPIOR01 1
-#define GPIOR02 2
-#define GPIOR03 3
-#define GPIOR04 4
-#define GPIOR05 5
-#define GPIOR06 6
-#define GPIOR07 7
-
-#define GPIOR1 _SFR_IO8(0x1A)
-#define GPIOR10 0
-#define GPIOR11 1
-#define GPIOR12 2
-#define GPIOR13 3
-#define GPIOR14 4
-#define GPIOR15 5
-#define GPIOR16 6
-#define GPIOR17 7
-
-#define GPIOR2 _SFR_IO8(0x1B)
-#define GPIOR20 0
-#define GPIOR21 1
-#define GPIOR22 2
-#define GPIOR23 3
-#define GPIOR24 4
-#define GPIOR25 5
-#define GPIOR26 6
-#define GPIOR27 7
-
-#define EECR _SFR_IO8(0x1C)
-#define EERE 0
-#define EEWE 1
-#define EEMWE 2
-#define EERIE 3
-#define EEPM0 4
-#define EEPM1 5
-#define EEPAGE 6
-#define NVMBSY 7
-
-#define EEDR _SFR_IO8(0x1D)
-
-/* Combine EEARL and EEARH */
-#define EEAR _SFR_IO16(0x1E)
-
-#define EEARL _SFR_IO8(0x1E)
-#define EEARH _SFR_IO8(0x1F)
-
-#define EIFR _SFR_IO8(0x20)
-#define INTF0 0
-#define INTF1 1
-#define INTF2 2
-
-#define EIMSK _SFR_IO8(0x21)
-#define INT0 0
-#define INT1 1
-#define INT2 2
-
-/* Combine OCR0SBL and OCR0SBH */
-#define OCR0SB _SFR_IO16(0x22)
-
-#define OCR0SBL _SFR_IO8(0x22)
-#define OCR0SBH _SFR_IO8(0x23)
-
-/* Combine OCR0RBL and OCR0RBH */
-#define OCR0RB _SFR_IO16(0x24)
-
-#define OCR0RBL _SFR_IO8(0x24)
-#define OCR0RBH _SFR_IO8(0x25)
-
-/* Combine OCR2SBL and OCR2SBH */
-#define OCR2SB _SFR_IO16(0x26)
-
-#define OCR2SBL _SFR_IO8(0x26)
-#define OCR2SBH _SFR_IO8(0x27)
-
-/* Combine OCR2RBL and OCR2RBH */
-#define OCR2RB _SFR_IO16(0x28)
-
-#define OCR2RBL _SFR_IO8(0x28)
-#define OCR2RBH _SFR_IO8(0x29)
-
-/* Combine OCR0RAL and OCR0RAH */
-#define OCR0RA _SFR_IO16(0x2A)
-
-#define OCR0RAL _SFR_IO8(0x2A)
-#define OCR0RAH _SFR_IO8(0x2B)
-
-/* Combine ADCL and ADCH */
-#ifndef __ASSEMBLER__
-#define ADC _SFR_IO16(0x2C)
-#endif
-#define ADCW _SFR_IO16(0x2C)
-
-#define ADCL _SFR_IO8(0x2C)
-#define ADCH _SFR_IO8(0x2D)
-
-/* Combine OCR2RAL and OCR2RAH */
-#define OCR2RA _SFR_IO16(0x2E)
-
-#define OCR2RAL _SFR_IO8(0x2E)
-#define OCR2RAH _SFR_IO8(0x2F)
-
-/* Reserved [0x30..0x32] */
-
-#define SMCR _SFR_IO8(0x33)
-#define SE 0
-#define SM0 1
-#define SM1 2
-#define SM2 3
-
-#define MCUSR _SFR_IO8(0x34)
-#define PORF 0
-#define EXTRF 1
-#define BORF 2
-#define WDRF 3
-
-#define MCUCR _SFR_IO8(0x35)
-#define IVCE 0
-#define IVSEL 1
-#define CKRC81 2
-#define RSTDIS 3
-#define PUD 4
-
-#define SPDR _SFR_IO8(0x36)
-
-#define SPMCSR _SFR_IO8(0x37)
-#define SPMEN 0
-#define PGERS 1
-#define PGWRT 2
-#define BLBSET 3
-#define RWWSRE 4
-#define SIGRD 5
-#define RWWSB 6
-#define SPMIE 7
-
-#define DACL _SFR_IO8(0x38)
-#define DACL0 0
-#define DACL1 1
-#define DACL2 2
-#define DACL3 3
-#define DACL4 4
-#define DACL5 5
-#define DACL6 6
-#define DACL7 7
-
-#define DACH _SFR_IO8(0x39)
-#define DACH0 0
-#define DACH1 1
-#define DACH2 2
-#define DACH3 3
-#define DACH4 4
-#define DACH5 5
-#define DACH6 6
-#define DACH7 7
-
-/* Combine TCNT1L and TCNT1H */
-#define TCNT1 _SFR_IO16(0x3A)
-
-#define TCNT1L _SFR_IO8(0x3A)
-#define TCNT1H _SFR_IO8(0x3B)
-
-/* Reserved [0x3C] */
-
-/* SP [0x3D..0x3E] */
-
-/* SREG [0x3F] */
-
-/* Combine OCR0SAL and OCR0SAH */
-#define OCR0SA _SFR_MEM16(0x60)
-
-#define OCR0SAL _SFR_MEM8(0x60)
-#define OCR0SAH _SFR_MEM8(0x61)
-
-#define PFRC0A _SFR_MEM8(0x62)
-#define PRFM0A0 0
-#define PRFM0A1 1
-#define PRFM0A2 2
-#define PRFM0A3 3
-#define PFLTE0A 4
-#define PELEV0A 5
-#define PISEL0A 6
-#define PCAE0A 7
-
-#define PFRC0B _SFR_MEM8(0x63)
-#define PRFM0B0 0
-#define PRFM0B1 1
-#define PRFM0B2 2
-#define PRFM0B3 3
-#define PFLTE0B 4
-#define PELEV0B 5
-#define PISEL0B 6
-#define PCAE0B 7
-
-/* Combine OCR2SAL and OCR2SAH */
-#define OCR2SA _SFR_MEM16(0x64)
-
-#define OCR2SAL _SFR_MEM8(0x64)
-#define OCR2SAH _SFR_MEM8(0x65)
-
-#define PFRC2A _SFR_MEM8(0x66)
-#define PRFM2A0 0
-#define PRFM2A1 1
-#define PRFM2A2 2
-#define PRFM2A3 3
-#define PFLTE2A 4
-#define PELEV2A 5
-#define PISEL2A 6
-#define PCAE2A 7
-
-#define PFRC2B _SFR_MEM8(0x67)
-#define PRFM2B0 0
-#define PRFM2B1 1
-#define PRFM2B2 2
-#define PRFM2B3 3
-#define PFLTE2B 4
-#define PELEV2B 5
-#define PISEL2B 6
-#define PCAE2B 7
-
-/* Combine PICR0L and PICR0H */
-#define PICR0 _SFR_MEM16(0x68)
-
-#define PICR0L _SFR_MEM8(0x68)
-#define PICR0H _SFR_MEM8(0x69)
-
-#define PSOC0 _SFR_MEM8(0x6A)
-#define POEN0A 0
-#define POEN0B 2
-#define PSYNC00 4
-#define PSYNC01 5
-#define PISEL0B1 6
-#define PISEL0A1 7
-
-/* Reserved [0x6B] */
-
-#define PICR2L _SFR_MEM8(0x6C)
-
-#define PICR2H _SFR_MEM8(0x6D)
-#define PICR28 0
-#define PICR29 1
-#define PICR210 2
-#define PICR211 3
-#define PCST2 7
-
-#define PSOC2 _SFR_MEM8(0x6E)
-#define POEN2A 0
-#define POEN2C 1
-#define POEN2B 2
-#define POEN2D 3
-#define PSYNC20 4
-#define PSYNC21 5
-#define POS22 6
-#define POS23 7
-
-#define POM2 _SFR_MEM8(0x6F)
-#define POMV2A0 0
-#define POMV2A1 1
-#define POMV2A2 2
-#define POMV2A3 3
-#define POMV2B0 4
-#define POMV2B1 5
-#define POMV2B2 6
-#define POMV2B3 7
-
-#define PCNFE2 _SFR_MEM8(0x70)
-#define PISEL2B1 0
-#define PISEL2A1 1
-#define PELEV2B1 2
-#define PELEV2A1 3
-#define PBFM21 4
-#define PASDLK20 5
-#define PASDLK21 6
-#define PASDLK22 7
-
-#define PASDLY2 _SFR_MEM8(0x71)
-
-/* Reserved [0x72..0x75] */
-
-#define DACON _SFR_MEM8(0x76)
-#define DAEN 0
-#define DALA 2
-#define DATS0 4
-#define DATS1 5
-#define DATS2 6
-#define DAATE 7
-
-#define DIDR0 _SFR_MEM8(0x77)
-#define ADC0D 0
-#define ADC1D 1
-#define ADC2D 2
-#define ADC3D 3
-#define ADC4D 4
-#define ADC5D 5
-#define ADC6D 6
-#define ADC7D 7
-
-#define DIDR1 _SFR_MEM8(0x78)
-#define ADC9D 0
-#define ADC10D 1
-#define AMP0POSD 2
-#define ACMP1MD 3
-
-#define AMP0CSR _SFR_MEM8(0x79)
-#define AMP0TS0 0
-#define AMP0TS1 1
-#define AMP0GS 3
-#define AMP0G0 4
-#define AMP0G1 5
-#define AMP0IS 6
-#define AMP0EN 7
-
-#define AC1ECON _SFR_MEM8(0x7A)
-#define AC1H0 0
-#define AC1H1 1
-#define AC1H2 2
-#define AC1ICE 3
-#define AC1OE 4
-#define AC1OI 5
-
-#define AC2ECON _SFR_MEM8(0x7B)
-#define AC2H0 0
-#define AC2H1 1
-#define AC2H2 2
-#define AC2OE 4
-#define AC2OI 5
-
-#define AC3ECON _SFR_MEM8(0x7C)
-#define AC3H0 0
-#define AC3H1 1
-#define AC3H2 2
-#define AC3OE 4
-#define AC3OI 5
-
-#define AC1CON _SFR_MEM8(0x7D)
-#define AC1M0 0
-#define AC1M1 1
-#define AC1M2 2
-#define AC1IS0 4
-#define AC1IS1 5
-#define AC1IE 6
-#define AC1EN 7
-
-#define AC2CON _SFR_MEM8(0x7E)
-#define AC2M0 0
-#define AC2M1 1
-#define AC2M2 2
-#define AC2IS0 4
-#define AC2IS1 5
-#define AC2IE 6
-#define AC2EN 7
-
-#define AC3CON _SFR_MEM8(0x7F)
-#define AC3M0 0
-#define AC3M1 1
-#define AC3M2 2
-#define AC3OEA 3
-#define AC3IS0 4
-#define AC3IS1 5
-#define AC3IE 6
-#define AC3EN 7
-
-#define BGCRR _SFR_MEM8(0x80)
-#define BGCR0 0
-#define BGCR1 1
-#define BGCR2 2
-#define BGCR3 3
-
-#define BGCCR _SFR_MEM8(0x81)
-#define BGCC0 0
-#define BGCC1 1
-#define BGCC2 2
-#define BGCC3 3
-
-#define WDTCSR _SFR_MEM8(0x82)
-#define WDE 3
-#define WDCE 4
-#define WDP0 0
-#define WDP1 1
-#define WDP2 2
-#define WDP3 5
-#define WDIE 6
-#define WDIF 7
-
-#define CLKPR _SFR_MEM8(0x83)
-#define CLKPS0 0
-#define CLKPS1 1
-#define CLKPS2 2
-#define CLKPS3 3
-#define CLKPCE 7
-
-#define CLKCSR _SFR_MEM8(0x84)
-#define CLKC0 0
-#define CLKC1 1
-#define CLKC2 2
-#define CLKC3 3
-#define CLKRDY 4
-#define CLKCCE 7
-
-#define CLKSELR _SFR_MEM8(0x85)
-#define CKSEL0 0
-#define CKSEL1 1
-#define CKSEL2 2
-#define CKSEL3 3
-#define CSUT0 4
-#define CSUT1 5
-#define COUT 6
-
-#define PRR _SFR_MEM8(0x86)
-#define PRADC 0
-#define PRSPI 2
-#define PRTIM1 4
-#define PRPSCR 5
-#define PRPSC2 7
-
-#define PLLCSR _SFR_MEM8(0x87)
-#define PLOCK 0
-#define PLLE 1
-#define PLLF0 2
-#define PLLF1 3
-#define PLLF2 4
-#define PLLF3 5
-
-#define OSCCAL _SFR_MEM8(0x88)
-#define OSCCAL0 0
-#define OSCCAL1 1
-#define OSCCAL2 2
-#define OSCCAL3 3
-#define OSCCAL4 4
-#define OSCCAL5 5
-#define OSCCAL6 6
-#define OSCCAL7 7
-
-#define EICRA _SFR_MEM8(0x89)
-#define ISC00 0
-#define ISC01 1
-#define ISC10 2
-#define ISC11 3
-#define ISC20 4
-#define ISC21 5
-
-#define TCCR1B _SFR_MEM8(0x8A)
-#define CS10 0
-#define CS11 1
-#define CS12 2
-#define WGM13 4
-#define ICES1 6
-#define ICNC1 7
-
-/* Reserved [0x8B] */
-
-/* Combine ICR1L and ICR1H */
-#define ICR1 _SFR_MEM16(0x8C)
-
-#define ICR1L _SFR_MEM8(0x8C)
-#define ICR1H _SFR_MEM8(0x8D)
-
-
-
-/* Interrupt vectors */
-/* Vector 0 is the reset vector */
-/* PSC2 Capture Event */
-#define PSC2_CAPT_vect _VECTOR(1)
-#define PSC2_CAPT_vect_num 1
-
-/* PSC2 End Cycle */
-#define PSC2_EC_vect _VECTOR(2)
-#define PSC2_EC_vect_num 2
-
-/* PSC2 End Of Enhanced Cycle */
-#define PSC2_EEC_vect _VECTOR(3)
-#define PSC2_EEC_vect_num 3
-
-/* PSC0 Capture Event */
-#define PSC0_CAPT_vect _VECTOR(4)
-#define PSC0_CAPT_vect_num 4
-
-/* PSC0 End Cycle */
-#define PSC0_EC_vect _VECTOR(5)
-#define PSC0_EC_vect_num 5
-
-/* PSC0 End Of Enhanced Cycle */
-#define PSC0_EEC_vect _VECTOR(6)
-#define PSC0_EEC_vect_num 6
-
-/* Analog Comparator 1 */
-#define ANALOG_COMP_1_vect _VECTOR(7)
-#define ANALOG_COMP_1_vect_num 7
-
-/* Analog Comparator 2 */
-#define ANALOG_COMP_2_vect _VECTOR(8)
-#define ANALOG_COMP_2_vect_num 8
-
-/* Analog Comparator 3 */
-#define ANALOG_COMP_3_vect _VECTOR(9)
-#define ANALOG_COMP_3_vect_num 9
-
-/* External Interrupt Request 0 */
-#define INT0_vect _VECTOR(10)
-#define INT0_vect_num 10
-
-/* Timer/Counter1 Capture Event */
-#define TIMER1_CAPT_vect _VECTOR(11)
-#define TIMER1_CAPT_vect_num 11
-
-/* Timer/Counter1 Overflow */
-#define TIMER1_OVF_vect _VECTOR(12)
-#define TIMER1_OVF_vect_num 12
-
-/* ADC Conversion Complete */
-#define ADC_vect _VECTOR(13)
-#define ADC_vect_num 13
-
-/* External Interrupt Request 1 */
-#define INT1_vect _VECTOR(14)
-#define INT1_vect_num 14
-
-/* SPI Serial Transfer Complet */
-#define SPI_STC_vect _VECTOR(15)
-#define SPI_STC_vect_num 15
-
-/* External Interrupt Request 2 */
-#define INT2_vect _VECTOR(16)
-#define INT2_vect_num 16
-
-/* Watchdog Timeout Interrupt */
-#define WDT_vect _VECTOR(17)
-#define WDT_vect_num 17
-
-/* EEPROM Ready */
-#define EE_READY_vect _VECTOR(18)
-#define EE_READY_vect_num 18
-
-/* Store Program Memory Read */
-#define SPM_READY_vect _VECTOR(19)
-#define SPM_READY_vect_num 19
-
-#define _VECTORS_SIZE 80
-
-
-/* Constants */
-
-#define SPM_PAGESIZE 128
-#define FLASHSTART 0x0000
-#define FLASHEND 0x3FFF
-#define RAMSTART 0x0100
-#define RAMSIZE 1024
-#define RAMEND 0x04FF
-#define E2START 0
-#define E2SIZE 512
-#define E2PAGESIZE 4
-#define E2END 0x01FF
-#define XRAMEND RAMEND
-
-
-/* Fuses */
-
-#define FUSE_MEMORY_SIZE 3
-
-/* Low Fuse Byte */
-#define FUSE_SUT_CKSEL0 (unsigned char)~_BV(0)
-#define FUSE_SUT_CKSEL1 (unsigned char)~_BV(1)
-#define FUSE_SUT_CKSEL2 (unsigned char)~_BV(2)
-#define FUSE_SUT_CKSEL3 (unsigned char)~_BV(3)
-#define FUSE_SUT_CKSEL4 (unsigned char)~_BV(4)
-#define FUSE_SUT_CKSEL5 (unsigned char)~_BV(5)
-#define FUSE_CKOUT (unsigned char)~_BV(6)
-#define FUSE_CKDIV8 (unsigned char)~_BV(7)
-
-/* High Fuse Byte */
-#define FUSE_BOOTRST (unsigned char)~_BV(0)
-#define FUSE_BOOTSZ0 (unsigned char)~_BV(1)
-#define FUSE_BOOTSZ1 (unsigned char)~_BV(2)
-#define FUSE_EESAVE (unsigned char)~_BV(3)
-#define FUSE_WDTON (unsigned char)~_BV(4)
-#define FUSE_SPIEN (unsigned char)~_BV(5)
-#define FUSE_DWEN (unsigned char)~_BV(6)
-#define FUSE_RSTDISBL (unsigned char)~_BV(7)
-
-/* Extended Fuse Byte */
-#define FUSE_BODLEVEL0 (unsigned char)~_BV(0)
-#define FUSE_BODLEVEL1 (unsigned char)~_BV(1)
-#define FUSE_BODLEVEL2 (unsigned char)~_BV(2)
-#define FUSE_PSCINRB (unsigned char)~_BV(3)
-#define FUSE_PSCRV (unsigned char)~_BV(4)
-#define FUSE_PSC0RB (unsigned char)~_BV(5)
-#define FUSE_PSC2RBA (unsigned char)~_BV(6)
-#define FUSE_PSC2RB (unsigned char)~_BV(7)
-
-
-/* Lock Bits */
-#define __LOCK_BITS_EXIST
-#define __BOOT_LOCK_BITS_0_EXIST
-#define __BOOT_LOCK_BITS_1_EXIST
-
-
-/* Signature */
-#define SIGNATURE_0 0x1E
-#define SIGNATURE_1 0x94
-#define SIGNATURE_2 0x8B
-
-
-#endif /* #ifdef _AVR_AT90PWM161_H_INCLUDED */
-
+/*****************************************************************************
+ *
+ * Copyright (C) 2014 Atmel Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in
+ * the documentation and/or other materials provided with the
+ * distribution.
+ *
+ * * Neither the name of the copyright holders nor the names of
+ * contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ ****************************************************************************/
+
+
+#ifndef _AVR_AT90PWM161_H_INCLUDED
+#define _AVR_AT90PWM161_H_INCLUDED
+
+
+#ifndef _AVR_IO_H_
+# error "Include <avr/io.h> instead of this file."
+#endif
+
+#ifndef _AVR_IOXXX_H_
+# define _AVR_IOXXX_H_ "io90pwm161.h"
+#else
+# error "Attempt to include more than one <avr/ioXXX.h> file."
+#endif
+
+/* Registers and associated bit numbers */
+
+#define ACSR _SFR_IO8(0x00)
+#define AC1O 1
+#define AC2O 2
+#define AC3O 3
+#define AC1IF 5
+#define AC2IF 6
+#define AC3IF 7
+
+#define TIMSK1 _SFR_IO8(0x01)
+#define TOIE1 0
+#define ICIE1 5
+
+#define TIFR1 _SFR_IO8(0x02)
+#define TOV1 0
+#define ICF1 5
+
+#define PINB _SFR_IO8(0x03)
+#define PINB7 7
+#define PINB6 6
+#define PINB5 5
+#define PINB4 4
+#define PINB3 3
+#define PINB2 2
+#define PINB1 1
+#define PINB0 0
+
+#define DDRB _SFR_IO8(0x04)
+#define DDRB7 7
+#define DDRB6 6
+#define DDRB5 5
+#define DDRB4 4
+#define DDRB3 3
+#define DDRB2 2
+#define DDRB1 1
+#define DDRB0 0
+
+#define PORTB _SFR_IO8(0x05)
+#define PORTB7 7
+#define PORTB6 6
+#define PORTB5 5
+#define PORTB4 4
+#define PORTB3 3
+#define PORTB2 2
+#define PORTB1 1
+#define PORTB0 0
+
+#define ADCSRA _SFR_IO8(0x06)
+#define ADPS0 0
+#define ADPS1 1
+#define ADPS2 2
+#define ADIE 3
+#define ADIF 4
+#define ADATE 5
+#define ADSC 6
+#define ADEN 7
+
+#define ADCSRB _SFR_IO8(0x07)
+#define ADTS0 0
+#define ADTS1 1
+#define ADTS2 2
+#define ADTS3 3
+#define ADSSEN 4
+#define ADNCDIS 6
+#define ADHSM 7
+
+#define ADMUX _SFR_IO8(0x08)
+#define MUX0 0
+#define MUX1 1
+#define MUX2 2
+#define MUX3 3
+#define ADLAR 5
+#define REFS0 6
+#define REFS1 7
+
+#define PIND _SFR_IO8(0x09)
+#define PIND7 7
+#define PIND6 6
+#define PIND5 5
+#define PIND4 4
+#define PIND3 3
+#define PIND2 2
+#define PIND1 1
+#define PIND0 0
+
+#define DDRD _SFR_IO8(0x0A)
+#define DDRD7 7
+#define DDRD6 6
+#define DDRD5 5
+#define DDRD4 4
+#define DDRD3 3
+#define DDRD2 2
+#define DDRD1 1
+#define DDRD0 0
+
+#define PORTD _SFR_IO8(0x0B)
+#define PORTD7 7
+#define PORTD6 6
+#define PORTD5 5
+#define PORTD4 4
+#define PORTD3 3
+#define PORTD2 2
+#define PORTD1 1
+#define PORTD0 0
+
+#define PINE _SFR_IO8(0x0C)
+#define PINE2 2
+#define PINE1 1
+#define PINE0 0
+
+#define DDRE _SFR_IO8(0x0D)
+#define DDRE2 2
+#define DDRE1 1
+#define DDRE0 0
+
+#define PORTE _SFR_IO8(0x0E)
+#define PORTE2 2
+#define PORTE1 1
+#define PORTE0 0
+
+#define PIM0 _SFR_IO8(0x0F)
+#define PEOPE0 0
+#define PEOEPE0 1
+#define PEVE0A 3
+#define PEVE0B 4
+
+#define PIFR0 _SFR_IO8(0x10)
+#define PEOP0 0
+#define PRN00 1
+#define PRN01 2
+#define PEV0A 3
+#define PEV0B 4
+#define POAC0A 6
+#define POAC0B 7
+
+#define PCNF0 _SFR_IO8(0x11)
+#define PCLKSEL0 1
+#define POP0 2
+#define PMODE00 3
+#define PMODE01 4
+#define PLOCK0 5
+#define PALOCK0 6
+#define PFIFTY0 7
+
+#define PCTL0 _SFR_IO8(0x12)
+#define PRUN0 0
+#define PCCYC0 1
+#define PAOC0A 3
+#define PAOC0B 4
+#define PBFM00 2
+#define PBFM01 5
+#define PPRE00 6
+#define PPRE01 7
+
+#define PIM2 _SFR_IO8(0x13)
+#define PEOPE2 0
+#define PEOEPE2 1
+#define PEVE2A 3
+#define PEVE2B 4
+#define PSEIE2 5
+
+#define PIFR2 _SFR_IO8(0x14)
+#define PEOP2 0
+#define PRN20 1
+#define PRN21 2
+#define PEV2A 3
+#define PEV2B 4
+#define PSEI2 5
+#define POAC2A 6
+#define POAC2B 7
+
+#define PCNF2 _SFR_IO8(0x15)
+#define POME2 0
+#define PCLKSEL2 1
+#define POP2 2
+#define PMODE20 3
+#define PMODE21 4
+#define PLOCK2 5
+#define PALOCK2 6
+#define PFIFTY2 7
+
+#define PCTL2 _SFR_IO8(0x16)
+#define PRUN2 0
+#define PCCYC2 1
+#define PARUN2 2
+#define PAOC2A 3
+#define PAOC2B 4
+#define PBFM2 5
+#define PPRE20 6
+#define PPRE21 7
+
+#define SPCR _SFR_IO8(0x17)
+#define SPR0 0
+#define SPR1 1
+#define CPHA 2
+#define CPOL 3
+#define MSTR 4
+#define DORD 5
+#define SPE 6
+#define SPIE 7
+
+#define SPSR _SFR_IO8(0x18)
+#define SPI2X 0
+#define WCOL 6
+#define SPIF 7
+
+#define GPIOR0 _SFR_IO8(0x19)
+#define GPIOR00 0
+#define GPIOR01 1
+#define GPIOR02 2
+#define GPIOR03 3
+#define GPIOR04 4
+#define GPIOR05 5
+#define GPIOR06 6
+#define GPIOR07 7
+
+#define GPIOR1 _SFR_IO8(0x1A)
+#define GPIOR10 0
+#define GPIOR11 1
+#define GPIOR12 2
+#define GPIOR13 3
+#define GPIOR14 4
+#define GPIOR15 5
+#define GPIOR16 6
+#define GPIOR17 7
+
+#define GPIOR2 _SFR_IO8(0x1B)
+#define GPIOR20 0
+#define GPIOR21 1
+#define GPIOR22 2
+#define GPIOR23 3
+#define GPIOR24 4
+#define GPIOR25 5
+#define GPIOR26 6
+#define GPIOR27 7
+
+#define EECR _SFR_IO8(0x1C)
+#define EERE 0
+#define EEWE 1
+#define EEMWE 2
+#define EERIE 3
+#define EEPM0 4
+#define EEPM1 5
+#define EEPAGE 6
+#define NVMBSY 7
+
+#define EEDR _SFR_IO8(0x1D)
+
+/* Combine EEARL and EEARH */
+#define EEAR _SFR_IO16(0x1E)
+
+#define EEARL _SFR_IO8(0x1E)
+#define EEARH _SFR_IO8(0x1F)
+
+#define EIFR _SFR_IO8(0x20)
+#define INTF0 0
+#define INTF1 1
+#define INTF2 2
+
+#define EIMSK _SFR_IO8(0x21)
+#define INT0 0
+#define INT1 1
+#define INT2 2
+
+/* Combine OCR0SBL and OCR0SBH */
+#define OCR0SB _SFR_IO16(0x22)
+
+#define OCR0SBL _SFR_IO8(0x22)
+#define OCR0SBH _SFR_IO8(0x23)
+
+/* Combine OCR0RBL and OCR0RBH */
+#define OCR0RB _SFR_IO16(0x24)
+
+#define OCR0RBL _SFR_IO8(0x24)
+#define OCR0RBH _SFR_IO8(0x25)
+
+/* Combine OCR2SBL and OCR2SBH */
+#define OCR2SB _SFR_IO16(0x26)
+
+#define OCR2SBL _SFR_IO8(0x26)
+#define OCR2SBH _SFR_IO8(0x27)
+
+/* Combine OCR2RBL and OCR2RBH */
+#define OCR2RB _SFR_IO16(0x28)
+
+#define OCR2RBL _SFR_IO8(0x28)
+#define OCR2RBH _SFR_IO8(0x29)
+
+/* Combine OCR0RAL and OCR0RAH */
+#define OCR0RA _SFR_IO16(0x2A)
+
+#define OCR0RAL _SFR_IO8(0x2A)
+#define OCR0RAH _SFR_IO8(0x2B)
+
+/* Combine ADCL and ADCH */
+#ifndef __ASSEMBLER__
+#define ADC _SFR_IO16(0x2C)
+#endif
+#define ADCW _SFR_IO16(0x2C)
+
+#define ADCL _SFR_IO8(0x2C)
+#define ADCH _SFR_IO8(0x2D)
+
+/* Combine OCR2RAL and OCR2RAH */
+#define OCR2RA _SFR_IO16(0x2E)
+
+#define OCR2RAL _SFR_IO8(0x2E)
+#define OCR2RAH _SFR_IO8(0x2F)
+
+/* Reserved [0x30..0x32] */
+
+#define SMCR _SFR_IO8(0x33)
+#define SE 0
+#define SM0 1
+#define SM1 2
+#define SM2 3
+
+#define MCUSR _SFR_IO8(0x34)
+#define PORF 0
+#define EXTRF 1
+#define BORF 2
+#define WDRF 3
+
+#define MCUCR _SFR_IO8(0x35)
+#define IVCE 0
+#define IVSEL 1
+#define CKRC81 2
+#define RSTDIS 3
+#define PUD 4
+
+#define SPDR _SFR_IO8(0x36)
+
+#define SPMCSR _SFR_IO8(0x37)
+#define SPMEN 0
+#define PGERS 1
+#define PGWRT 2
+#define BLBSET 3
+#define RWWSRE 4
+#define SIGRD 5
+#define RWWSB 6
+#define SPMIE 7
+
+#define DACL _SFR_IO8(0x38)
+#define DACL0 0
+#define DACL1 1
+#define DACL2 2
+#define DACL3 3
+#define DACL4 4
+#define DACL5 5
+#define DACL6 6
+#define DACL7 7
+
+#define DACH _SFR_IO8(0x39)
+#define DACH0 0
+#define DACH1 1
+#define DACH2 2
+#define DACH3 3
+#define DACH4 4
+#define DACH5 5
+#define DACH6 6
+#define DACH7 7
+
+/* Combine TCNT1L and TCNT1H */
+#define TCNT1 _SFR_IO16(0x3A)
+
+#define TCNT1L _SFR_IO8(0x3A)
+#define TCNT1H _SFR_IO8(0x3B)
+
+/* Reserved [0x3C] */
+
+/* SP [0x3D..0x3E] */
+
+/* SREG [0x3F] */
+
+/* Combine OCR0SAL and OCR0SAH */
+#define OCR0SA _SFR_MEM16(0x60)
+
+#define OCR0SAL _SFR_MEM8(0x60)
+#define OCR0SAH _SFR_MEM8(0x61)
+
+#define PFRC0A _SFR_MEM8(0x62)
+#define PRFM0A0 0
+#define PRFM0A1 1
+#define PRFM0A2 2
+#define PRFM0A3 3
+#define PFLTE0A 4
+#define PELEV0A 5
+#define PISEL0A 6
+#define PCAE0A 7
+
+#define PFRC0B _SFR_MEM8(0x63)
+#define PRFM0B0 0
+#define PRFM0B1 1
+#define PRFM0B2 2
+#define PRFM0B3 3
+#define PFLTE0B 4
+#define PELEV0B 5
+#define PISEL0B 6
+#define PCAE0B 7
+
+/* Combine OCR2SAL and OCR2SAH */
+#define OCR2SA _SFR_MEM16(0x64)
+
+#define OCR2SAL _SFR_MEM8(0x64)
+#define OCR2SAH _SFR_MEM8(0x65)
+
+#define PFRC2A _SFR_MEM8(0x66)
+#define PRFM2A0 0
+#define PRFM2A1 1
+#define PRFM2A2 2
+#define PRFM2A3 3
+#define PFLTE2A 4
+#define PELEV2A 5
+#define PISEL2A 6
+#define PCAE2A 7
+
+#define PFRC2B _SFR_MEM8(0x67)
+#define PRFM2B0 0
+#define PRFM2B1 1
+#define PRFM2B2 2
+#define PRFM2B3 3
+#define PFLTE2B 4
+#define PELEV2B 5
+#define PISEL2B 6
+#define PCAE2B 7
+
+/* Combine PICR0L and PICR0H */
+#define PICR0 _SFR_MEM16(0x68)
+
+#define PICR0L _SFR_MEM8(0x68)
+#define PICR0H _SFR_MEM8(0x69)
+
+#define PSOC0 _SFR_MEM8(0x6A)
+#define POEN0A 0
+#define POEN0B 2
+#define PSYNC00 4
+#define PSYNC01 5
+#define PISEL0B1 6
+#define PISEL0A1 7
+
+/* Reserved [0x6B] */
+
+#define PICR2L _SFR_MEM8(0x6C)
+
+#define PICR2H _SFR_MEM8(0x6D)
+#define PICR28 0
+#define PICR29 1
+#define PICR210 2
+#define PICR211 3
+#define PCST2 7
+
+#define PSOC2 _SFR_MEM8(0x6E)
+#define POEN2A 0
+#define POEN2C 1
+#define POEN2B 2
+#define POEN2D 3
+#define PSYNC20 4
+#define PSYNC21 5
+#define POS22 6
+#define POS23 7
+
+#define POM2 _SFR_MEM8(0x6F)
+#define POMV2A0 0
+#define POMV2A1 1
+#define POMV2A2 2
+#define POMV2A3 3
+#define POMV2B0 4
+#define POMV2B1 5
+#define POMV2B2 6
+#define POMV2B3 7
+
+#define PCNFE2 _SFR_MEM8(0x70)
+#define PISEL2B1 0
+#define PISEL2A1 1
+#define PELEV2B1 2
+#define PELEV2A1 3
+#define PBFM21 4
+#define PASDLK20 5
+#define PASDLK21 6
+#define PASDLK22 7
+
+#define PASDLY2 _SFR_MEM8(0x71)
+
+/* Reserved [0x72..0x75] */
+
+#define DACON _SFR_MEM8(0x76)
+#define DAEN 0
+#define DALA 2
+#define DATS0 4
+#define DATS1 5
+#define DATS2 6
+#define DAATE 7
+
+#define DIDR0 _SFR_MEM8(0x77)
+#define ADC0D 0
+#define ADC1D 1
+#define ADC2D 2
+#define ADC3D 3
+#define ADC4D 4
+#define ADC5D 5
+#define ADC6D 6
+#define ADC7D 7
+
+#define DIDR1 _SFR_MEM8(0x78)
+#define ADC9D 0
+#define ADC10D 1
+#define AMP0POSD 2
+#define ACMP1MD 3
+
+#define AMP0CSR _SFR_MEM8(0x79)
+#define AMP0TS0 0
+#define AMP0TS1 1
+#define AMP0GS 3
+#define AMP0G0 4
+#define AMP0G1 5
+#define AMP0IS 6
+#define AMP0EN 7
+
+#define AC1ECON _SFR_MEM8(0x7A)
+#define AC1H0 0
+#define AC1H1 1
+#define AC1H2 2
+#define AC1ICE 3
+#define AC1OE 4
+#define AC1OI 5
+
+#define AC2ECON _SFR_MEM8(0x7B)
+#define AC2H0 0
+#define AC2H1 1
+#define AC2H2 2
+#define AC2OE 4
+#define AC2OI 5
+
+#define AC3ECON _SFR_MEM8(0x7C)
+#define AC3H0 0
+#define AC3H1 1
+#define AC3H2 2
+#define AC3OE 4
+#define AC3OI 5
+
+#define AC1CON _SFR_MEM8(0x7D)
+#define AC1M0 0
+#define AC1M1 1
+#define AC1M2 2
+#define AC1IS0 4
+#define AC1IS1 5
+#define AC1IE 6
+#define AC1EN 7
+
+#define AC2CON _SFR_MEM8(0x7E)
+#define AC2M0 0
+#define AC2M1 1
+#define AC2M2 2
+#define AC2IS0 4
+#define AC2IS1 5
+#define AC2IE 6
+#define AC2EN 7
+
+#define AC3CON _SFR_MEM8(0x7F)
+#define AC3M0 0
+#define AC3M1 1
+#define AC3M2 2
+#define AC3OEA 3
+#define AC3IS0 4
+#define AC3IS1 5
+#define AC3IE 6
+#define AC3EN 7
+
+#define BGCRR _SFR_MEM8(0x80)
+#define BGCR0 0
+#define BGCR1 1
+#define BGCR2 2
+#define BGCR3 3
+
+#define BGCCR _SFR_MEM8(0x81)
+#define BGCC0 0
+#define BGCC1 1
+#define BGCC2 2
+#define BGCC3 3
+
+#define WDTCSR _SFR_MEM8(0x82)
+#define WDE 3
+#define WDCE 4
+#define WDP0 0
+#define WDP1 1
+#define WDP2 2
+#define WDP3 5
+#define WDIE 6
+#define WDIF 7
+
+#define CLKPR _SFR_MEM8(0x83)
+#define CLKPS0 0
+#define CLKPS1 1
+#define CLKPS2 2
+#define CLKPS3 3
+#define CLKPCE 7
+
+#define CLKCSR _SFR_MEM8(0x84)
+#define CLKC0 0
+#define CLKC1 1
+#define CLKC2 2
+#define CLKC3 3
+#define CLKRDY 4
+#define CLKCCE 7
+
+#define CLKSELR _SFR_MEM8(0x85)
+#define CKSEL0 0
+#define CKSEL1 1
+#define CKSEL2 2
+#define CKSEL3 3
+#define CSUT0 4
+#define CSUT1 5
+#define COUT 6
+
+#define PRR _SFR_MEM8(0x86)
+#define PRADC 0
+#define PRSPI 2
+#define PRTIM1 4
+#define PRPSCR 5
+#define PRPSC2 7
+
+#define PLLCSR _SFR_MEM8(0x87)
+#define PLOCK 0
+#define PLLE 1
+#define PLLF0 2
+#define PLLF1 3
+#define PLLF2 4
+#define PLLF3 5
+
+#define OSCCAL _SFR_MEM8(0x88)
+#define OSCCAL0 0
+#define OSCCAL1 1
+#define OSCCAL2 2
+#define OSCCAL3 3
+#define OSCCAL4 4
+#define OSCCAL5 5
+#define OSCCAL6 6
+#define OSCCAL7 7
+
+#define EICRA _SFR_MEM8(0x89)
+#define ISC00 0
+#define ISC01 1
+#define ISC10 2
+#define ISC11 3
+#define ISC20 4
+#define ISC21 5
+
+#define TCCR1B _SFR_MEM8(0x8A)
+#define CS10 0
+#define CS11 1
+#define CS12 2
+#define WGM13 4
+#define ICES1 6
+#define ICNC1 7
+
+/* Reserved [0x8B] */
+
+/* Combine ICR1L and ICR1H */
+#define ICR1 _SFR_MEM16(0x8C)
+
+#define ICR1L _SFR_MEM8(0x8C)
+#define ICR1H _SFR_MEM8(0x8D)
+
+
+
+/* Interrupt vectors */
+/* Vector 0 is the reset vector */
+/* PSC2 Capture Event */
+#define PSC2_CAPT_vect _VECTOR(1)
+#define PSC2_CAPT_vect_num 1
+
+/* PSC2 End Cycle */
+#define PSC2_EC_vect _VECTOR(2)
+#define PSC2_EC_vect_num 2
+
+/* PSC2 End Of Enhanced Cycle */
+#define PSC2_EEC_vect _VECTOR(3)
+#define PSC2_EEC_vect_num 3
+
+/* PSC0 Capture Event */
+#define PSC0_CAPT_vect _VECTOR(4)
+#define PSC0_CAPT_vect_num 4
+
+/* PSC0 End Cycle */
+#define PSC0_EC_vect _VECTOR(5)
+#define PSC0_EC_vect_num 5
+
+/* PSC0 End Of Enhanced Cycle */
+#define PSC0_EEC_vect _VECTOR(6)
+#define PSC0_EEC_vect_num 6
+
+/* Analog Comparator 1 */
+#define ANALOG_COMP_1_vect _VECTOR(7)
+#define ANALOG_COMP_1_vect_num 7
+
+/* Analog Comparator 2 */
+#define ANALOG_COMP_2_vect _VECTOR(8)
+#define ANALOG_COMP_2_vect_num 8
+
+/* Analog Comparator 3 */
+#define ANALOG_COMP_3_vect _VECTOR(9)
+#define ANALOG_COMP_3_vect_num 9
+
+/* External Interrupt Request 0 */
+#define INT0_vect _VECTOR(10)
+#define INT0_vect_num 10
+
+/* Timer/Counter1 Capture Event */
+#define TIMER1_CAPT_vect _VECTOR(11)
+#define TIMER1_CAPT_vect_num 11
+
+/* Timer/Counter1 Overflow */
+#define TIMER1_OVF_vect _VECTOR(12)
+#define TIMER1_OVF_vect_num 12
+
+/* ADC Conversion Complete */
+#define ADC_vect _VECTOR(13)
+#define ADC_vect_num 13
+
+/* External Interrupt Request 1 */
+#define INT1_vect _VECTOR(14)
+#define INT1_vect_num 14
+
+/* SPI Serial Transfer Complet */
+#define SPI_STC_vect _VECTOR(15)
+#define SPI_STC_vect_num 15
+
+/* External Interrupt Request 2 */
+#define INT2_vect _VECTOR(16)
+#define INT2_vect_num 16
+
+/* Watchdog Timeout Interrupt */
+#define WDT_vect _VECTOR(17)
+#define WDT_vect_num 17
+
+/* EEPROM Ready */
+#define EE_READY_vect _VECTOR(18)
+#define EE_READY_vect_num 18
+
+/* Store Program Memory Read */
+#define SPM_READY_vect _VECTOR(19)
+#define SPM_READY_vect_num 19
+
+#define _VECTORS_SIZE 80
+
+
+/* Constants */
+
+#define SPM_PAGESIZE 128
+#define FLASHSTART 0x0000
+#define FLASHEND 0x3FFF
+#define RAMSTART 0x0100
+#define RAMSIZE 1024
+#define RAMEND 0x04FF
+#define E2START 0
+#define E2SIZE 512
+#define E2PAGESIZE 4
+#define E2END 0x01FF
+#define XRAMEND RAMEND
+
+
+/* Fuses */
+
+#define FUSE_MEMORY_SIZE 3
+
+/* Low Fuse Byte */
+#define FUSE_SUT_CKSEL0 (unsigned char)~_BV(0)
+#define FUSE_SUT_CKSEL1 (unsigned char)~_BV(1)
+#define FUSE_SUT_CKSEL2 (unsigned char)~_BV(2)
+#define FUSE_SUT_CKSEL3 (unsigned char)~_BV(3)
+#define FUSE_SUT_CKSEL4 (unsigned char)~_BV(4)
+#define FUSE_SUT_CKSEL5 (unsigned char)~_BV(5)
+#define FUSE_CKOUT (unsigned char)~_BV(6)
+#define FUSE_CKDIV8 (unsigned char)~_BV(7)
+
+/* High Fuse Byte */
+#define FUSE_BOOTRST (unsigned char)~_BV(0)
+#define FUSE_BOOTSZ0 (unsigned char)~_BV(1)
+#define FUSE_BOOTSZ1 (unsigned char)~_BV(2)
+#define FUSE_EESAVE (unsigned char)~_BV(3)
+#define FUSE_WDTON (unsigned char)~_BV(4)
+#define FUSE_SPIEN (unsigned char)~_BV(5)
+#define FUSE_DWEN (unsigned char)~_BV(6)
+#define FUSE_RSTDISBL (unsigned char)~_BV(7)
+
+/* Extended Fuse Byte */
+#define FUSE_BODLEVEL0 (unsigned char)~_BV(0)
+#define FUSE_BODLEVEL1 (unsigned char)~_BV(1)
+#define FUSE_BODLEVEL2 (unsigned char)~_BV(2)
+#define FUSE_PSCINRB (unsigned char)~_BV(3)
+#define FUSE_PSCRV (unsigned char)~_BV(4)
+#define FUSE_PSC0RB (unsigned char)~_BV(5)
+#define FUSE_PSC2RBA (unsigned char)~_BV(6)
+#define FUSE_PSC2RB (unsigned char)~_BV(7)
+
+
+/* Lock Bits */
+#define __LOCK_BITS_EXIST
+#define __BOOT_LOCK_BITS_0_EXIST
+#define __BOOT_LOCK_BITS_1_EXIST
+
+
+/* Signature */
+#define SIGNATURE_0 0x1E
+#define SIGNATURE_1 0x94
+#define SIGNATURE_2 0x8B
+
+
+#endif /* #ifdef _AVR_AT90PWM161_H_INCLUDED */
+
Property changes on: trunk/avr-libc/include/avr/io90pwm161.h
___________________________________________________________________
Added: svn:mime-type
+ text/plain
Added: svn:keywords
+ Author Id Date
Added: svn:eol-style
+ native
Modified: trunk/avr-libc/include/avr/ioa5272.h
===================================================================
--- trunk/avr-libc/include/avr/ioa5272.h 2014-08-05 06:57:11 UTC (rev
2434)
+++ trunk/avr-libc/include/avr/ioa5272.h 2014-08-11 10:31:52 UTC (rev
2435)
@@ -1,745 +1,745 @@
-/*****************************************************************************
- *
- * Copyright (C) 2014 Atmel Corporation
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *
- * * Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- *
- * * Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- *
- * * Neither the name of the copyright holders nor the names of
- * contributors may be used to endorse or promote products derived
- * from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
- * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- ****************************************************************************/
-
-
-#ifndef _AVR_ATA5272_H_INCLUDED
-#define _AVR_ATA5272_H_INCLUDED
-
-
-#ifndef _AVR_IO_H_
-# error "Include <avr/io.h> instead of this file."
-#endif
-
-#ifndef _AVR_IOXXX_H_
-# define _AVR_IOXXX_H_ "ioa5272.h"
-#else
-# error "Attempt to include more than one <avr/ioXXX.h> file."
-#endif
-
-/* Registers and associated bit numbers */
-
-#define PINA _SFR_IO8(0x00)
-#define PINA7 7
-#define PINA6 6
-#define PINA5 5
-#define PINA4 4
-#define PINA3 3
-#define PINA2 2
-#define PINA1 1
-#define PINA0 0
-
-#define DDRA _SFR_IO8(0x01)
-#define DDRA7 7
-#define DDRA6 6
-#define DDRA5 5
-#define DDRA4 4
-#define DDRA3 3
-#define DDRA2 2
-#define DDRA1 1
-#define DDRA0 0
-
-#define PORTA _SFR_IO8(0x02)
-#define PORTA7 7
-#define PORTA6 6
-#define PORTA5 5
-#define PORTA4 4
-#define PORTA3 3
-#define PORTA2 2
-#define PORTA1 1
-#define PORTA0 0
-
-#define PINB _SFR_IO8(0x03)
-#define PINB7 7
-#define PINB6 6
-#define PINB5 5
-#define PINB4 4
-#define PINB3 3
-#define PINB2 2
-#define PINB1 1
-#define PINB0 0
-
-#define DDRB _SFR_IO8(0x04)
-#define DDRB7 7
-#define DDRB6 6
-#define DDRB5 5
-#define DDRB4 4
-#define DDRB3 3
-#define DDRB2 2
-#define DDRB1 1
-#define DDRB0 0
-
-#define PORTB _SFR_IO8(0x05)
-#define PORTB7 7
-#define PORTB6 6
-#define PORTB5 5
-#define PORTB4 4
-#define PORTB3 3
-#define PORTB2 2
-#define PORTB1 1
-#define PORTB0 0
-
-/* Reserved [0x06..0x11] */
-
-#define PORTCR _SFR_IO8(0x12)
-
-/* Reserved [0x13..0x14] */
-
-#define TIFR0 _SFR_IO8(0x15)
-#define TOV0 0
-#define OCF0A 1
-
-#define TIFR1 _SFR_IO8(0x16)
-#define TOV1 0
-#define OCF1A 1
-#define OCF1B 2
-#define ICF1 5
-
-/* Reserved [0x17..0x1A] */
-
-#define PCIFR _SFR_IO8(0x1B)
-#define PCIF0 0
-#define PCIF1 1
-
-#define EIFR _SFR_IO8(0x1C)
-#define INTF0 0
-#define INTF1 1
-
-#define EIMSK _SFR_IO8(0x1D)
-#define INT0 0
-#define INT1 1
-
-#define GPIOR0 _SFR_IO8(0x1E)
-
-#define EECR _SFR_IO8(0x1F)
-#define EERE 0
-#define EEPE 1
-#define EEMPE 2
-#define EERIE 3
-#define EEPM0 4
-#define EEPM1 5
-
-#define EEDR _SFR_IO8(0x20)
-
-/* Combine EEARL and EEARH */
-#define EEAR _SFR_IO16(0x21)
-
-#define EEARL _SFR_IO8(0x21)
-#define EEARH _SFR_IO8(0x22)
-
-#define GTCCR _SFR_IO8(0x23)
-#define PSR1 0
-#define PSR0 1
-#define TSM 7
-
-/* Reserved [0x24] */
-
-#define TCCR0A _SFR_IO8(0x25)
-#define WGM00 0
-#define WGM01 1
-#define COM0A0 6
-#define COM0A1 7
-
-#define TCCR0B _SFR_IO8(0x26)
-#define CS00 0
-#define CS01 1
-#define CS02 2
-#define FOC0A 7
-
-#define TCNT2 _SFR_IO8(0x27)
-
-#define OCR0A _SFR_IO8(0x28)
-
-/* Reserved [0x29] */
-
-#define GPIOR1 _SFR_IO8(0x2A)
-
-#define GPIOR2 _SFR_IO8(0x2B)
-
-#define SPCR _SFR_IO8(0x2C)
-#define SPR0 0
-#define SPR1 1
-#define CPHA 2
-#define CPOL 3
-#define MSTR 4
-#define DORD 5
-#define SPE 6
-#define SPIE 7
-
-#define SPSR _SFR_IO8(0x2D)
-#define SPI2X 0
-#define WCOL 6
-#define SPIF 7
-
-#define SPDR _SFR_IO8(0x2E)
-
-/* Reserved [0x2F] */
-
-#define ACSR _SFR_IO8(0x30)
-#define ACIS0 0
-#define ACIS1 1
-#define ACIC 2
-#define ACIE 3
-#define ACI 4
-#define ACO 5
-#define ACIRS 6
-#define ACD 7
-
-#define DWDR _SFR_IO8(0x31)
-
-/* Reserved [0x32] */
-
-#define SMCR _SFR_IO8(0x33)
-#define SE 0
-#define SM0 1
-#define SM1 2
-
-#define MCUSR _SFR_IO8(0x34)
-#define PORF 0
-#define EXTRF 1
-#define BORF 2
-#define WDRF 3
-
-#define MCUCR _SFR_IO8(0x35)
-#define PUD 4
-#define BODS 5
-#define BODSE 6
-
-/* Reserved [0x36] */
-
-#define SPMCSR _SFR_IO8(0x37)
-#define SPMEN 0
-#define PGERS 1
-#define PGWRT 2
-#define RFLB 3
-#define CTPB 4
-#define SIGRD 5
-#define RWWSB 6
-
-/* Reserved [0x38..0x3C] */
-
-/* SP [0x3D..0x3E] */
-
-/* SREG [0x3F] */
-
-#define WDTCR _SFR_MEM8(0x60)
-#define WDE 3
-#define WDCE 4
-#define WDP0 0
-#define WDP1 1
-#define WDP2 2
-#define WDP3 5
-#define WDIE 6
-#define WDIF 7
-
-#define CLKPR _SFR_MEM8(0x61)
-#define CLKPS0 0
-#define CLKPS1 1
-#define CLKPS2 2
-#define CLKPS3 3
-#define CLKPCE 7
-
-#define CLKCSR _SFR_MEM8(0x62)
-#define CLKC0 0
-#define CLKC1 1
-#define CLKC2 2
-#define CLKC3 3
-#define CLKRDY 4
-#define CLKCCE 7
-
-#define CLKSELR _SFR_MEM8(0x63)
-#define CSEL0 0
-#define CSEL1 1
-#define CSEL2 2
-#define CSEL3 3
-#define CSUT0 4
-#define CSUT1 5
-#define COUT 6
-
-#define PRR _SFR_MEM8(0x64)
-#define PRADC 0
-#define PRUSI 1
-#define PRTIM0 2
-#define PRTIM1 3
-#define PRSPI 4
-#define PRLIN 5
-
-/* Reserved [0x65] */
-
-#define OSCCAL _SFR_MEM8(0x66)
-#define OSCCAL0 0
-#define OSCCAL1 1
-#define OSCCAL2 2
-#define OSCCAL3 3
-#define OSCCAL4 4
-#define OSCCAL5 5
-#define OSCCAL6 6
-#define OSCCAL7 7
-
-/* Reserved [0x67] */
-
-#define PCICR _SFR_MEM8(0x68)
-#define PCIE0 0
-#define PCIE1 1
-
-#define EICRA _SFR_MEM8(0x69)
-#define ISC00 0
-#define ISC01 1
-#define ISC10 2
-#define ISC11 3
-
-/* Reserved [0x6A] */
-
-#define PCMSK0 _SFR_MEM8(0x6B)
-#define PCINT0 0
-#define PCINT1 1
-#define PCINT2 2
-#define PCINT3 3
-#define PCINT4 4
-#define PCINT5 5
-#define PCINT6 6
-#define PCINT7 7
-
-#define PCMSK1 _SFR_MEM8(0x6C)
-#define PCINT8 0
-#define PCINT9 1
-#define PCINT10 2
-#define PCINT11 3
-#define PCINT12 4
-#define PCINT13 5
-#define PCINT14 6
-#define PCINT15 7
-
-/* Reserved [0x6D] */
-
-#define TIMSK0 _SFR_MEM8(0x6E)
-#define TOIE0 0
-#define OCIE0A 1
-
-#define TIMSK1 _SFR_MEM8(0x6F)
-#define TOIE1 0
-#define OCIE1A 1
-#define OCIE1B 2
-#define ICIE1 5
-
-/* Reserved [0x70..0x76] */
-
-#define AMISCR _SFR_MEM8(0x77)
-#define XREFEN 1
-#define AREFEN 2
-#define ISRCEN 0
-
-/* Combine ADCL and ADCH */
-#ifndef __ASSEMBLER__
-#define ADC _SFR_MEM16(0x78)
-#endif
-#define ADCW _SFR_MEM16(0x78)
-
-#define ADCL _SFR_MEM8(0x78)
-#define ADCH _SFR_MEM8(0x79)
-
-#define ADCSRA _SFR_MEM8(0x7A)
-#define ADPS0 0
-#define ADPS1 1
-#define ADPS2 2
-#define ADIE 3
-#define ADIF 4
-#define ADATE 5
-#define ADSC 6
-#define ADEN 7
-
-#define ADCSRB _SFR_MEM8(0x7B)
-#define ADTS0 0
-#define ADTS1 1
-#define ADTS2 2
-#define BIN 7
-#define ACIR0 4
-#define ACIR1 5
-#define ACME 6
-
-#define ADMUX _SFR_MEM8(0x7C)
-#define MUX0 0
-#define MUX1 1
-#define MUX2 2
-#define MUX3 3
-#define MUX4 4
-#define ADLAR 5
-#define REFS0 6
-#define REFS1 7
-
-/* Reserved [0x7D] */
-
-#define DIDR0 _SFR_MEM8(0x7E)
-#define ADC0D 0
-#define ADC1D 1
-#define ADC2D 2
-#define ADC3D 3
-#define ADC4D 4
-#define ADC5D 5
-#define ADC6D 6
-#define ADC7D 7
-
-#define DIDR1 _SFR_MEM8(0x7F)
-#define ADC8D 0
-#define ADC9D 1
-#define ADC10D 2
-
-#define TCCR1A _SFR_MEM8(0x80)
-#define WGM10 0
-#define WGM11 1
-#define COM1B0 4
-#define COM1B1 5
-#define COM1A0 6
-#define COM1A1 7
-
-#define TCCR1B _SFR_MEM8(0x81)
-#define CS10 0
-#define CS11 1
-#define CS12 2
-#define WGM12 3
-#define WGM13 4
-#define ICES1 6
-#define ICNC1 7
-
-#define TCCR1C _SFR_MEM8(0x82)
-#define FOC1B 6
-#define FOC1A 7
-
-#define TCCR1D _SFR_MEM8(0x83)
-#define OC1AU 0
-#define OC1AV 1
-#define OC1AW 2
-#define OC1AX 3
-#define OC1BU 4
-#define OC1BV 5
-#define OC1BW 6
-#define OC1BX 7
-
-/* Combine TCNT1L and TCNT1H */
-#define TCNT1 _SFR_MEM16(0x84)
-
-#define TCNT1L _SFR_MEM8(0x84)
-#define TCNT1H _SFR_MEM8(0x85)
-
-/* Combine ICR1L and ICR1H */
-#define ICR1 _SFR_MEM16(0x86)
-
-#define ICR1L _SFR_MEM8(0x86)
-#define ICR1H _SFR_MEM8(0x87)
-
-/* Combine OCR1AL and OCR1AH */
-#define OCR1A _SFR_MEM16(0x88)
-
-#define OCR1AL _SFR_MEM8(0x88)
-#define OCR1AH _SFR_MEM8(0x89)
-
-/* Combine OCR1BL and OCR1BH */
-#define OCR1B _SFR_MEM16(0x8A)
-
-#define OCR1BL _SFR_MEM8(0x8A)
-#define OCR1BH _SFR_MEM8(0x8B)
-
-/* Reserved [0x8C..0xB5] */
-
-#define ASSR _SFR_MEM8(0xB6)
-#define TCR0BUB 0
-#define TCR0AUB 1
-#define OCR0AUB 3
-#define TCN0UB 4
-#define AS0 5
-#define EXCLK 6
-
-/* Reserved [0xB7] */
-
-#define USICR _SFR_MEM8(0xB8)
-#define USITC 0
-#define USICLK 1
-#define USICS0 2
-#define USICS1 3
-#define USIWM0 4
-#define USIWM1 5
-#define USIOIE 6
-#define USISIE 7
-
-#define USISR _SFR_MEM8(0xB9)
-#define USICNT0 0
-#define USICNT1 1
-#define USICNT2 2
-#define USICNT3 3
-#define USIDC 4
-#define USIPF 5
-#define USIOIF 6
-#define USISIF 7
-
-#define USIDR _SFR_MEM8(0xBA)
-
-#define USIBR _SFR_MEM8(0xBB)
-
-#define USIPP _SFR_MEM8(0xBC)
-
-/* Reserved [0xBD..0xC7] */
-
-#define LINCR _SFR_MEM8(0xC8)
-#define LCMD0 0
-#define LCMD1 1
-#define LCMD2 2
-#define LENA 3
-#define LCONF0 4
-#define LCONF1 5
-#define LIN13 6
-#define LSWRES 7
-
-#define LINSIR _SFR_MEM8(0xC9)
-#define LRXOK 0
-#define LTXOK 1
-#define LIDOK 2
-#define LERR 3
-#define LBUSY 4
-#define LIDST0 5
-#define LIDST1 6
-#define LIDST2 7
-
-#define LINENIR _SFR_MEM8(0xCA)
-#define LENRXOK 0
-#define LENTXOK 1
-#define LENIDOK 2
-#define LENERR 3
-
-#define LINERR _SFR_MEM8(0xCB)
-#define LBERR 0
-#define LCERR 1
-#define LPERR 2
-#define LSERR 3
-#define LFERR 4
-#define LOVERR 5
-#define LTOERR 6
-#define LABORT 7
-
-#define LINBTR _SFR_MEM8(0xCC)
-#define LBT0 0
-#define LBT1 1
-#define LBT2 2
-#define LBT3 3
-#define LBT4 4
-#define LBT5 5
-#define LDISR 7
-
-#define LINBRRL _SFR_MEM8(0xCD)
-#define LDIV0 0
-#define LDIV1 1
-#define LDIV2 2
-#define LDIV3 3
-#define LDIV4 4
-#define LDIV5 5
-#define LDIV6 6
-#define LDIV7 7
-
-#define LINBRRH _SFR_MEM8(0xCE)
-#define LDIV8 0
-#define LDIV9 1
-#define LDIV10 2
-#define LDIV11 3
-
-#define LINDLR _SFR_MEM8(0xCF)
-#define LRXDL0 0
-#define LRXDL1 1
-#define LRXDL2 2
-#define LRXDL3 3
-#define LTXDL0 4
-#define LTXDL1 5
-#define LTXDL2 6
-#define LTXDL3 7
-
-#define LINIDR _SFR_MEM8(0xD0)
-#define LID0 0
-#define LID1 1
-#define LID2 2
-#define LID3 3
-#define LID4 4
-#define LID5 5
-#define LP0 6
-#define LP1 7
-
-#define LINSEL _SFR_MEM8(0xD1)
-#define LINDX0 0
-#define LINDX1 1
-#define LINDX2 2
-#define LAINC 3
-
-#define LINDAT _SFR_MEM8(0xD2)
-#define LDATA0 0
-#define LDATA1 1
-#define LDATA2 2
-#define LDATA3 3
-#define LDATA4 4
-#define LDATA5 5
-#define LDATA6 6
-#define LDATA7 7
-
-
-
-/* Interrupt vectors */
-/* Vector 0 is the reset vector */
-/* External Interrupt Request 0 */
-#define INT0_vect _VECTOR(1)
-#define INT0_vect_num 1
-
-/* External Interrupt Request 1 */
-#define INT1_vect _VECTOR(2)
-#define INT1_vect_num 2
-
-/* Pin Change Interrupt Request 0 */
-#define PCINT0_vect _VECTOR(3)
-#define PCINT0_vect_num 3
-
-/* Pin Change Interrupt Request 1 */
-#define PCINT1_vect _VECTOR(4)
-#define PCINT1_vect_num 4
-
-/* Watchdog Time-Out Interrupt */
-#define WDT_vect _VECTOR(5)
-#define WDT_vect_num 5
-
-/* Timer/Counter1 Capture Event */
-#define TIMER1_CAPT_vect _VECTOR(6)
-#define TIMER1_CAPT_vect_num 6
-
-/* Timer/Counter1 Compare Match 1A */
-#define TIMER1_COMPA_vect _VECTOR(7)
-#define TIMER1_COMPA_vect_num 7
-
-/* Timer/Counter1 Compare Match 1B */
-#define TIMER1_COMPB_vect _VECTOR(8)
-#define TIMER1_COMPB_vect_num 8
-
-/* Timer/Counter1 Overflow */
-#define TIMER1_OVF_vect _VECTOR(9)
-#define TIMER1_OVF_vect_num 9
-
-/* Timer/Counter0 Compare Match 0A */
-#define TIMER0_COMPA_vect _VECTOR(10)
-#define TIMER0_COMPA_vect_num 10
-
-/* Timer/Counter0 Overflow */
-#define TIMER0_OVF_vect _VECTOR(11)
-#define TIMER0_OVF_vect_num 11
-
-/* LIN Transfer Complete */
-#define LIN_TC_vect _VECTOR(12)
-#define LIN_TC_vect_num 12
-
-/* LIN Error */
-#define LIN_ERR_vect _VECTOR(13)
-#define LIN_ERR_vect_num 13
-
-/* SPI Serial Transfer Complete */
-#define SPI_STC_vect _VECTOR(14)
-#define SPI_STC_vect_num 14
-
-/* ADC Conversion Complete */
-#define ADC_vect _VECTOR(15)
-#define ADC_vect_num 15
-
-/* EEPROM Ready */
-#define EE_RDY_vect _VECTOR(16)
-#define EE_RDY_vect_num 16
-
-/* USI Overflow */
-#define USI_OVF_vect _VECTOR(19)
-#define USI_OVF_vect_num 19
-
-/* Analog Comparator */
-#define ANA_COMP_vect _VECTOR(34)
-#define ANA_COMP_vect_num 34
-
-/* USI Start */
-#define USI_START_vect _VECTOR(36)
-#define USI_START_vect_num 36
-
-#define _VECTORS_SIZE 74
-
-
-/* Constants */
-
-#define SPM_PAGESIZE 128
-#define FLASHSTART 0x0000
-#define FLASHEND 0x1FFF
-#define RAMSTART 0x0100
-#define RAMSIZE 512
-#define RAMEND 0x02FF
-#define E2START 0
-#define E2SIZE 512
-#define E2PAGESIZE 4
-#define E2END 0x01FF
-#define XRAMEND RAMEND
-
-
-/* Fuses */
-
-#define FUSE_MEMORY_SIZE 3
-
-/* Low Fuse Byte */
-#define FUSE_SUT_CKSEL0 (unsigned char)~_BV(0)
-#define FUSE_SUT_CKSEL1 (unsigned char)~_BV(1)
-#define FUSE_SUT_CKSEL2 (unsigned char)~_BV(2)
-#define FUSE_SUT_CKSEL3 (unsigned char)~_BV(3)
-#define FUSE_SUT_CKSEL4 (unsigned char)~_BV(4)
-#define FUSE_SUT_CKSEL5 (unsigned char)~_BV(5)
-#define FUSE_CKOUT (unsigned char)~_BV(6)
-#define FUSE_CKDIV8 (unsigned char)~_BV(7)
-
-/* High Fuse Byte */
-#define FUSE_BODLEVEL0 (unsigned char)~_BV(0)
-#define FUSE_BODLEVEL1 (unsigned char)~_BV(1)
-#define FUSE_BODLEVEL2 (unsigned char)~_BV(2)
-#define FUSE_EESAVE (unsigned char)~_BV(3)
-#define FUSE_WDTON (unsigned char)~_BV(4)
-#define FUSE_SPIEN (unsigned char)~_BV(5)
-#define FUSE_DWEN (unsigned char)~_BV(6)
-#define FUSE_RSTDISBL (unsigned char)~_BV(7)
-
-/* Extended Fuse Byte */
-#define FUSE_SELFPRGEN (unsigned char)~_BV(0)
-
-
-/* Lock Bits */
-#define __LOCK_BITS_EXIST
-
-
-/* Signature */
-#define SIGNATURE_0 0x1E
-#define SIGNATURE_1 0x93
-#define SIGNATURE_2 0x87
-
-
-#endif /* #ifdef _AVR_ATA5272_H_INCLUDED */
-
+/*****************************************************************************
+ *
+ * Copyright (C) 2014 Atmel Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in
+ * the documentation and/or other materials provided with the
+ * distribution.
+ *
+ * * Neither the name of the copyright holders nor the names of
+ * contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ ****************************************************************************/
+
+
+#ifndef _AVR_ATA5272_H_INCLUDED
+#define _AVR_ATA5272_H_INCLUDED
+
+
+#ifndef _AVR_IO_H_
+# error "Include <avr/io.h> instead of this file."
+#endif
+
+#ifndef _AVR_IOXXX_H_
+# define _AVR_IOXXX_H_ "ioa5272.h"
+#else
+# error "Attempt to include more than one <avr/ioXXX.h> file."
+#endif
+
+/* Registers and associated bit numbers */
+
+#define PINA _SFR_IO8(0x00)
+#define PINA7 7
+#define PINA6 6
+#define PINA5 5
+#define PINA4 4
+#define PINA3 3
+#define PINA2 2
+#define PINA1 1
+#define PINA0 0
+
+#define DDRA _SFR_IO8(0x01)
+#define DDRA7 7
+#define DDRA6 6
+#define DDRA5 5
+#define DDRA4 4
+#define DDRA3 3
+#define DDRA2 2
+#define DDRA1 1
+#define DDRA0 0
+
+#define PORTA _SFR_IO8(0x02)
+#define PORTA7 7
+#define PORTA6 6
+#define PORTA5 5
+#define PORTA4 4
+#define PORTA3 3
+#define PORTA2 2
+#define PORTA1 1
+#define PORTA0 0
+
+#define PINB _SFR_IO8(0x03)
+#define PINB7 7
+#define PINB6 6
+#define PINB5 5
+#define PINB4 4
+#define PINB3 3
+#define PINB2 2
+#define PINB1 1
+#define PINB0 0
+
+#define DDRB _SFR_IO8(0x04)
+#define DDRB7 7
+#define DDRB6 6
+#define DDRB5 5
+#define DDRB4 4
+#define DDRB3 3
+#define DDRB2 2
+#define DDRB1 1
+#define DDRB0 0
+
+#define PORTB _SFR_IO8(0x05)
+#define PORTB7 7
+#define PORTB6 6
+#define PORTB5 5
+#define PORTB4 4
+#define PORTB3 3
+#define PORTB2 2
+#define PORTB1 1
+#define PORTB0 0
+
+/* Reserved [0x06..0x11] */
+
+#define PORTCR _SFR_IO8(0x12)
+
+/* Reserved [0x13..0x14] */
+
+#define TIFR0 _SFR_IO8(0x15)
+#define TOV0 0
+#define OCF0A 1
+
+#define TIFR1 _SFR_IO8(0x16)
+#define TOV1 0
+#define OCF1A 1
+#define OCF1B 2
+#define ICF1 5
+
+/* Reserved [0x17..0x1A] */
+
+#define PCIFR _SFR_IO8(0x1B)
+#define PCIF0 0
+#define PCIF1 1
+
+#define EIFR _SFR_IO8(0x1C)
+#define INTF0 0
+#define INTF1 1
+
+#define EIMSK _SFR_IO8(0x1D)
+#define INT0 0
+#define INT1 1
+
+#define GPIOR0 _SFR_IO8(0x1E)
+
+#define EECR _SFR_IO8(0x1F)
+#define EERE 0
+#define EEPE 1
+#define EEMPE 2
+#define EERIE 3
+#define EEPM0 4
+#define EEPM1 5
+
+#define EEDR _SFR_IO8(0x20)
+
+/* Combine EEARL and EEARH */
+#define EEAR _SFR_IO16(0x21)
+
+#define EEARL _SFR_IO8(0x21)
+#define EEARH _SFR_IO8(0x22)
+
+#define GTCCR _SFR_IO8(0x23)
+#define PSR1 0
+#define PSR0 1
+#define TSM 7
+
+/* Reserved [0x24] */
+
+#define TCCR0A _SFR_IO8(0x25)
+#define WGM00 0
+#define WGM01 1
+#define COM0A0 6
+#define COM0A1 7
+
+#define TCCR0B _SFR_IO8(0x26)
+#define CS00 0
+#define CS01 1
+#define CS02 2
+#define FOC0A 7
+
+#define TCNT2 _SFR_IO8(0x27)
+
+#define OCR0A _SFR_IO8(0x28)
+
+/* Reserved [0x29] */
+
+#define GPIOR1 _SFR_IO8(0x2A)
+
+#define GPIOR2 _SFR_IO8(0x2B)
+
+#define SPCR _SFR_IO8(0x2C)
+#define SPR0 0
+#define SPR1 1
+#define CPHA 2
+#define CPOL 3
+#define MSTR 4
+#define DORD 5
+#define SPE 6
+#define SPIE 7
+
+#define SPSR _SFR_IO8(0x2D)
+#define SPI2X 0
+#define WCOL 6
+#define SPIF 7
+
+#define SPDR _SFR_IO8(0x2E)
+
+/* Reserved [0x2F] */
+
+#define ACSR _SFR_IO8(0x30)
+#define ACIS0 0
+#define ACIS1 1
+#define ACIC 2
+#define ACIE 3
+#define ACI 4
+#define ACO 5
+#define ACIRS 6
+#define ACD 7
+
+#define DWDR _SFR_IO8(0x31)
+
+/* Reserved [0x32] */
+
+#define SMCR _SFR_IO8(0x33)
+#define SE 0
+#define SM0 1
+#define SM1 2
+
+#define MCUSR _SFR_IO8(0x34)
+#define PORF 0
+#define EXTRF 1
+#define BORF 2
+#define WDRF 3
+
+#define MCUCR _SFR_IO8(0x35)
+#define PUD 4
+#define BODS 5
+#define BODSE 6
+
+/* Reserved [0x36] */
+
+#define SPMCSR _SFR_IO8(0x37)
+#define SPMEN 0
+#define PGERS 1
+#define PGWRT 2
+#define RFLB 3
+#define CTPB 4
+#define SIGRD 5
+#define RWWSB 6
+
+/* Reserved [0x38..0x3C] */
+
+/* SP [0x3D..0x3E] */
+
+/* SREG [0x3F] */
+
+#define WDTCR _SFR_MEM8(0x60)
+#define WDE 3
+#define WDCE 4
+#define WDP0 0
+#define WDP1 1
+#define WDP2 2
+#define WDP3 5
+#define WDIE 6
+#define WDIF 7
+
+#define CLKPR _SFR_MEM8(0x61)
+#define CLKPS0 0
+#define CLKPS1 1
+#define CLKPS2 2
+#define CLKPS3 3
+#define CLKPCE 7
+
+#define CLKCSR _SFR_MEM8(0x62)
+#define CLKC0 0
+#define CLKC1 1
+#define CLKC2 2
+#define CLKC3 3
+#define CLKRDY 4
+#define CLKCCE 7
+
+#define CLKSELR _SFR_MEM8(0x63)
+#define CSEL0 0
+#define CSEL1 1
+#define CSEL2 2
+#define CSEL3 3
+#define CSUT0 4
+#define CSUT1 5
+#define COUT 6
+
+#define PRR _SFR_MEM8(0x64)
+#define PRADC 0
+#define PRUSI 1
+#define PRTIM0 2
+#define PRTIM1 3
+#define PRSPI 4
+#define PRLIN 5
+
+/* Reserved [0x65] */
+
+#define OSCCAL _SFR_MEM8(0x66)
+#define OSCCAL0 0
+#define OSCCAL1 1
+#define OSCCAL2 2
+#define OSCCAL3 3
+#define OSCCAL4 4
+#define OSCCAL5 5
+#define OSCCAL6 6
+#define OSCCAL7 7
+
+/* Reserved [0x67] */
+
+#define PCICR _SFR_MEM8(0x68)
+#define PCIE0 0
+#define PCIE1 1
+
+#define EICRA _SFR_MEM8(0x69)
+#define ISC00 0
+#define ISC01 1
+#define ISC10 2
+#define ISC11 3
+
+/* Reserved [0x6A] */
+
+#define PCMSK0 _SFR_MEM8(0x6B)
+#define PCINT0 0
+#define PCINT1 1
+#define PCINT2 2
+#define PCINT3 3
+#define PCINT4 4
+#define PCINT5 5
+#define PCINT6 6
+#define PCINT7 7
+
+#define PCMSK1 _SFR_MEM8(0x6C)
+#define PCINT8 0
+#define PCINT9 1
+#define PCINT10 2
+#define PCINT11 3
+#define PCINT12 4
+#define PCINT13 5
+#define PCINT14 6
+#define PCINT15 7
+
+/* Reserved [0x6D] */
+
+#define TIMSK0 _SFR_MEM8(0x6E)
+#define TOIE0 0
+#define OCIE0A 1
+
+#define TIMSK1 _SFR_MEM8(0x6F)
+#define TOIE1 0
+#define OCIE1A 1
+#define OCIE1B 2
+#define ICIE1 5
+
+/* Reserved [0x70..0x76] */
+
+#define AMISCR _SFR_MEM8(0x77)
+#define XREFEN 1
+#define AREFEN 2
+#define ISRCEN 0
+
+/* Combine ADCL and ADCH */
+#ifndef __ASSEMBLER__
+#define ADC _SFR_MEM16(0x78)
+#endif
+#define ADCW _SFR_MEM16(0x78)
+
+#define ADCL _SFR_MEM8(0x78)
+#define ADCH _SFR_MEM8(0x79)
+
+#define ADCSRA _SFR_MEM8(0x7A)
+#define ADPS0 0
+#define ADPS1 1
+#define ADPS2 2
+#define ADIE 3
+#define ADIF 4
+#define ADATE 5
+#define ADSC 6
+#define ADEN 7
+
+#define ADCSRB _SFR_MEM8(0x7B)
+#define ADTS0 0
+#define ADTS1 1
+#define ADTS2 2
+#define BIN 7
+#define ACIR0 4
+#define ACIR1 5
+#define ACME 6
+
+#define ADMUX _SFR_MEM8(0x7C)
+#define MUX0 0
+#define MUX1 1
+#define MUX2 2
+#define MUX3 3
+#define MUX4 4
+#define ADLAR 5
+#define REFS0 6
+#define REFS1 7
+
+/* Reserved [0x7D] */
+
+#define DIDR0 _SFR_MEM8(0x7E)
+#define ADC0D 0
+#define ADC1D 1
+#define ADC2D 2
+#define ADC3D 3
+#define ADC4D 4
+#define ADC5D 5
+#define ADC6D 6
+#define ADC7D 7
+
+#define DIDR1 _SFR_MEM8(0x7F)
+#define ADC8D 0
+#define ADC9D 1
+#define ADC10D 2
+
+#define TCCR1A _SFR_MEM8(0x80)
+#define WGM10 0
+#define WGM11 1
+#define COM1B0 4
+#define COM1B1 5
+#define COM1A0 6
+#define COM1A1 7
+
+#define TCCR1B _SFR_MEM8(0x81)
+#define CS10 0
+#define CS11 1
+#define CS12 2
+#define WGM12 3
+#define WGM13 4
+#define ICES1 6
+#define ICNC1 7
+
+#define TCCR1C _SFR_MEM8(0x82)
+#define FOC1B 6
+#define FOC1A 7
+
+#define TCCR1D _SFR_MEM8(0x83)
+#define OC1AU 0
+#define OC1AV 1
+#define OC1AW 2
+#define OC1AX 3
+#define OC1BU 4
+#define OC1BV 5
+#define OC1BW 6
+#define OC1BX 7
+
+/* Combine TCNT1L and TCNT1H */
+#define TCNT1 _SFR_MEM16(0x84)
+
+#define TCNT1L _SFR_MEM8(0x84)
+#define TCNT1H _SFR_MEM8(0x85)
+
+/* Combine ICR1L and ICR1H */
+#define ICR1 _SFR_MEM16(0x86)
+
+#define ICR1L _SFR_MEM8(0x86)
+#define ICR1H _SFR_MEM8(0x87)
+
+/* Combine OCR1AL and OCR1AH */
+#define OCR1A _SFR_MEM16(0x88)
+
+#define OCR1AL _SFR_MEM8(0x88)
+#define OCR1AH _SFR_MEM8(0x89)
+
+/* Combine OCR1BL and OCR1BH */
+#define OCR1B _SFR_MEM16(0x8A)
+
+#define OCR1BL _SFR_MEM8(0x8A)
+#define OCR1BH _SFR_MEM8(0x8B)
+
+/* Reserved [0x8C..0xB5] */
+
+#define ASSR _SFR_MEM8(0xB6)
+#define TCR0BUB 0
+#define TCR0AUB 1
+#define OCR0AUB 3
+#define TCN0UB 4
+#define AS0 5
+#define EXCLK 6
+
+/* Reserved [0xB7] */
+
+#define USICR _SFR_MEM8(0xB8)
+#define USITC 0
+#define USICLK 1
+#define USICS0 2
+#define USICS1 3
+#define USIWM0 4
+#define USIWM1 5
+#define USIOIE 6
+#define USISIE 7
+
+#define USISR _SFR_MEM8(0xB9)
+#define USICNT0 0
+#define USICNT1 1
+#define USICNT2 2
+#define USICNT3 3
+#define USIDC 4
+#define USIPF 5
+#define USIOIF 6
+#define USISIF 7
+
+#define USIDR _SFR_MEM8(0xBA)
+
+#define USIBR _SFR_MEM8(0xBB)
+
+#define USIPP _SFR_MEM8(0xBC)
+
+/* Reserved [0xBD..0xC7] */
+
+#define LINCR _SFR_MEM8(0xC8)
+#define LCMD0 0
+#define LCMD1 1
+#define LCMD2 2
+#define LENA 3
+#define LCONF0 4
+#define LCONF1 5
+#define LIN13 6
+#define LSWRES 7
+
+#define LINSIR _SFR_MEM8(0xC9)
+#define LRXOK 0
+#define LTXOK 1
+#define LIDOK 2
+#define LERR 3
+#define LBUSY 4
+#define LIDST0 5
+#define LIDST1 6
+#define LIDST2 7
+
+#define LINENIR _SFR_MEM8(0xCA)
+#define LENRXOK 0
+#define LENTXOK 1
+#define LENIDOK 2
+#define LENERR 3
+
+#define LINERR _SFR_MEM8(0xCB)
+#define LBERR 0
+#define LCERR 1
+#define LPERR 2
+#define LSERR 3
+#define LFERR 4
+#define LOVERR 5
+#define LTOERR 6
+#define LABORT 7
+
+#define LINBTR _SFR_MEM8(0xCC)
+#define LBT0 0
+#define LBT1 1
+#define LBT2 2
+#define LBT3 3
+#define LBT4 4
+#define LBT5 5
+#define LDISR 7
+
+#define LINBRRL _SFR_MEM8(0xCD)
+#define LDIV0 0
+#define LDIV1 1
+#define LDIV2 2
+#define LDIV3 3
+#define LDIV4 4
+#define LDIV5 5
+#define LDIV6 6
+#define LDIV7 7
+
+#define LINBRRH _SFR_MEM8(0xCE)
+#define LDIV8 0
+#define LDIV9 1
+#define LDIV10 2
+#define LDIV11 3
+
+#define LINDLR _SFR_MEM8(0xCF)
+#define LRXDL0 0
+#define LRXDL1 1
+#define LRXDL2 2
+#define LRXDL3 3
+#define LTXDL0 4
+#define LTXDL1 5
+#define LTXDL2 6
+#define LTXDL3 7
+
+#define LINIDR _SFR_MEM8(0xD0)
+#define LID0 0
+#define LID1 1
+#define LID2 2
+#define LID3 3
+#define LID4 4
+#define LID5 5
+#define LP0 6
+#define LP1 7
+
+#define LINSEL _SFR_MEM8(0xD1)
+#define LINDX0 0
+#define LINDX1 1
+#define LINDX2 2
+#define LAINC 3
+
+#define LINDAT _SFR_MEM8(0xD2)
+#define LDATA0 0
+#define LDATA1 1
+#define LDATA2 2
+#define LDATA3 3
+#define LDATA4 4
+#define LDATA5 5
+#define LDATA6 6
+#define LDATA7 7
+
+
+
+/* Interrupt vectors */
+/* Vector 0 is the reset vector */
+/* External Interrupt Request 0 */
+#define INT0_vect _VECTOR(1)
+#define INT0_vect_num 1
+
+/* External Interrupt Request 1 */
+#define INT1_vect _VECTOR(2)
+#define INT1_vect_num 2
+
+/* Pin Change Interrupt Request 0 */
+#define PCINT0_vect _VECTOR(3)
+#define PCINT0_vect_num 3
+
+/* Pin Change Interrupt Request 1 */
+#define PCINT1_vect _VECTOR(4)
+#define PCINT1_vect_num 4
+
+/* Watchdog Time-Out Interrupt */
+#define WDT_vect _VECTOR(5)
+#define WDT_vect_num 5
+
+/* Timer/Counter1 Capture Event */
+#define TIMER1_CAPT_vect _VECTOR(6)
+#define TIMER1_CAPT_vect_num 6
+
+/* Timer/Counter1 Compare Match 1A */
+#define TIMER1_COMPA_vect _VECTOR(7)
+#define TIMER1_COMPA_vect_num 7
+
+/* Timer/Counter1 Compare Match 1B */
+#define TIMER1_COMPB_vect _VECTOR(8)
+#define TIMER1_COMPB_vect_num 8
+
+/* Timer/Counter1 Overflow */
+#define TIMER1_OVF_vect _VECTOR(9)
+#define TIMER1_OVF_vect_num 9
+
+/* Timer/Counter0 Compare Match 0A */
+#define TIMER0_COMPA_vect _VECTOR(10)
+#define TIMER0_COMPA_vect_num 10
+
+/* Timer/Counter0 Overflow */
+#define TIMER0_OVF_vect _VECTOR(11)
+#define TIMER0_OVF_vect_num 11
+
+/* LIN Transfer Complete */
+#define LIN_TC_vect _VECTOR(12)
+#define LIN_TC_vect_num 12
+
+/* LIN Error */
+#define LIN_ERR_vect _VECTOR(13)
+#define LIN_ERR_vect_num 13
+
+/* SPI Serial Transfer Complete */
+#define SPI_STC_vect _VECTOR(14)
+#define SPI_STC_vect_num 14
+
+/* ADC Conversion Complete */
+#define ADC_vect _VECTOR(15)
+#define ADC_vect_num 15
+
+/* EEPROM Ready */
+#define EE_RDY_vect _VECTOR(16)
+#define EE_RDY_vect_num 16
+
+/* USI Overflow */
+#define USI_OVF_vect _VECTOR(19)
+#define USI_OVF_vect_num 19
+
+/* Analog Comparator */
+#define ANA_COMP_vect _VECTOR(34)
+#define ANA_COMP_vect_num 34
+
+/* USI Start */
+#define USI_START_vect _VECTOR(36)
+#define USI_START_vect_num 36
+
+#define _VECTORS_SIZE 74
+
+
+/* Constants */
+
+#define SPM_PAGESIZE 128
+#define FLASHSTART 0x0000
+#define FLASHEND 0x1FFF
+#define RAMSTART 0x0100
+#define RAMSIZE 512
+#define RAMEND 0x02FF
+#define E2START 0
+#define E2SIZE 512
+#define E2PAGESIZE 4
+#define E2END 0x01FF
+#define XRAMEND RAMEND
+
+
+/* Fuses */
+
+#define FUSE_MEMORY_SIZE 3
+
+/* Low Fuse Byte */
+#define FUSE_SUT_CKSEL0 (unsigned char)~_BV(0)
+#define FUSE_SUT_CKSEL1 (unsigned char)~_BV(1)
+#define FUSE_SUT_CKSEL2 (unsigned char)~_BV(2)
+#define FUSE_SUT_CKSEL3 (unsigned char)~_BV(3)
+#define FUSE_SUT_CKSEL4 (unsigned char)~_BV(4)
+#define FUSE_SUT_CKSEL5 (unsigned char)~_BV(5)
+#define FUSE_CKOUT (unsigned char)~_BV(6)
+#define FUSE_CKDIV8 (unsigned char)~_BV(7)
+
+/* High Fuse Byte */
+#define FUSE_BODLEVEL0 (unsigned char)~_BV(0)
+#define FUSE_BODLEVEL1 (unsigned char)~_BV(1)
+#define FUSE_BODLEVEL2 (unsigned char)~_BV(2)
+#define FUSE_EESAVE (unsigned char)~_BV(3)
+#define FUSE_WDTON (unsigned char)~_BV(4)
+#define FUSE_SPIEN (unsigned char)~_BV(5)
+#define FUSE_DWEN (unsigned char)~_BV(6)
+#define FUSE_RSTDISBL (unsigned char)~_BV(7)
+
+/* Extended Fuse Byte */
+#define FUSE_SELFPRGEN (unsigned char)~_BV(0)
+
+
+/* Lock Bits */
+#define __LOCK_BITS_EXIST
+
+
+/* Signature */
+#define SIGNATURE_0 0x1E
+#define SIGNATURE_1 0x93
+#define SIGNATURE_2 0x87
+
+
+#endif /* #ifdef _AVR_ATA5272_H_INCLUDED */
+
Property changes on: trunk/avr-libc/include/avr/ioa5272.h
___________________________________________________________________
Added: svn:mime-type
+ text/plain
Added: svn:keywords
+ Author Id Date
Added: svn:eol-style
+ native
Modified: trunk/avr-libc/include/avr/ioa5505.h
===================================================================
--- trunk/avr-libc/include/avr/ioa5505.h 2014-08-05 06:57:11 UTC (rev
2434)
+++ trunk/avr-libc/include/avr/ioa5505.h 2014-08-11 10:31:52 UTC (rev
2435)
@@ -1,745 +1,745 @@
-/*****************************************************************************
- *
- * Copyright (C) 2014 Atmel Corporation
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *
- * * Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- *
- * * Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- *
- * * Neither the name of the copyright holders nor the names of
- * contributors may be used to endorse or promote products derived
- * from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
- * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- ****************************************************************************/
-
-
-#ifndef _AVR_ATA5505_H_INCLUDED
-#define _AVR_ATA5505_H_INCLUDED
-
-
-#ifndef _AVR_IO_H_
-# error "Include <avr/io.h> instead of this file."
-#endif
-
-#ifndef _AVR_IOXXX_H_
-# define _AVR_IOXXX_H_ "ioa5505.h"
-#else
-# error "Attempt to include more than one <avr/ioXXX.h> file."
-#endif
-
-/* Registers and associated bit numbers */
-
-#define PINA _SFR_IO8(0x00)
-#define PINA7 7
-#define PINA6 6
-#define PINA5 5
-#define PINA4 4
-#define PINA3 3
-#define PINA2 2
-#define PINA1 1
-#define PINA0 0
-
-#define DDRA _SFR_IO8(0x01)
-#define DDRA7 7
-#define DDRA6 6
-#define DDRA5 5
-#define DDRA4 4
-#define DDRA3 3
-#define DDRA2 2
-#define DDRA1 1
-#define DDRA0 0
-
-#define PORTA _SFR_IO8(0x02)
-#define PORTA7 7
-#define PORTA6 6
-#define PORTA5 5
-#define PORTA4 4
-#define PORTA3 3
-#define PORTA2 2
-#define PORTA1 1
-#define PORTA0 0
-
-#define PINB _SFR_IO8(0x03)
-#define PINB7 7
-#define PINB6 6
-#define PINB5 5
-#define PINB4 4
-#define PINB3 3
-#define PINB2 2
-#define PINB1 1
-#define PINB0 0
-
-#define DDRB _SFR_IO8(0x04)
-#define DDRB7 7
-#define DDRB6 6
-#define DDRB5 5
-#define DDRB4 4
-#define DDRB3 3
-#define DDRB2 2
-#define DDRB1 1
-#define DDRB0 0
-
-#define PORTB _SFR_IO8(0x05)
-#define PORTB7 7
-#define PORTB6 6
-#define PORTB5 5
-#define PORTB4 4
-#define PORTB3 3
-#define PORTB2 2
-#define PORTB1 1
-#define PORTB0 0
-
-/* Reserved [0x06..0x11] */
-
-#define PORTCR _SFR_IO8(0x12)
-
-/* Reserved [0x13..0x14] */
-
-#define TIFR0 _SFR_IO8(0x15)
-#define TOV0 0
-#define OCF0A 1
-
-#define TIFR1 _SFR_IO8(0x16)
-#define TOV1 0
-#define OCF1A 1
-#define OCF1B 2
-#define ICF1 5
-
-/* Reserved [0x17..0x1A] */
-
-#define PCIFR _SFR_IO8(0x1B)
-#define PCIF0 0
-#define PCIF1 1
-
-#define EIFR _SFR_IO8(0x1C)
-#define INTF0 0
-#define INTF1 1
-
-#define EIMSK _SFR_IO8(0x1D)
-#define INT0 0
-#define INT1 1
-
-#define GPIOR0 _SFR_IO8(0x1E)
-
-#define EECR _SFR_IO8(0x1F)
-#define EERE 0
-#define EEPE 1
-#define EEMPE 2
-#define EERIE 3
-#define EEPM0 4
-#define EEPM1 5
-
-#define EEDR _SFR_IO8(0x20)
-
-/* Combine EEARL and EEARH */
-#define EEAR _SFR_IO16(0x21)
-
-#define EEARL _SFR_IO8(0x21)
-#define EEARH _SFR_IO8(0x22)
-
-#define GTCCR _SFR_IO8(0x23)
-#define PSR1 0
-#define PSR0 1
-#define TSM 7
-
-/* Reserved [0x24] */
-
-#define TCCR0A _SFR_IO8(0x25)
-#define WGM00 0
-#define WGM01 1
-#define COM0A0 6
-#define COM0A1 7
-
-#define TCCR0B _SFR_IO8(0x26)
-#define CS00 0
-#define CS01 1
-#define CS02 2
-#define FOC0A 7
-
-#define TCNT2 _SFR_IO8(0x27)
-
-#define OCR0A _SFR_IO8(0x28)
-
-/* Reserved [0x29] */
-
-#define GPIOR1 _SFR_IO8(0x2A)
-
-#define GPIOR2 _SFR_IO8(0x2B)
-
-#define SPCR _SFR_IO8(0x2C)
-#define SPR0 0
-#define SPR1 1
-#define CPHA 2
-#define CPOL 3
-#define MSTR 4
-#define DORD 5
-#define SPE 6
-#define SPIE 7
-
-#define SPSR _SFR_IO8(0x2D)
-#define SPI2X 0
-#define WCOL 6
-#define SPIF 7
-
-#define SPDR _SFR_IO8(0x2E)
-
-/* Reserved [0x2F] */
-
-#define ACSR _SFR_IO8(0x30)
-#define ACIS0 0
-#define ACIS1 1
-#define ACIC 2
-#define ACIE 3
-#define ACI 4
-#define ACO 5
-#define ACIRS 6
-#define ACD 7
-
-#define DWDR _SFR_IO8(0x31)
-
-/* Reserved [0x32] */
-
-#define SMCR _SFR_IO8(0x33)
-#define SE 0
-#define SM0 1
-#define SM1 2
-
-#define MCUSR _SFR_IO8(0x34)
-#define PORF 0
-#define EXTRF 1
-#define BORF 2
-#define WDRF 3
-
-#define MCUCR _SFR_IO8(0x35)
-#define PUD 4
-#define BODS 5
-#define BODSE 6
-
-/* Reserved [0x36] */
-
-#define SPMCSR _SFR_IO8(0x37)
-#define SPMEN 0
-#define PGERS 1
-#define PGWRT 2
-#define RFLB 3
-#define CTPB 4
-#define SIGRD 5
-#define RWWSB 6
-
-/* Reserved [0x38..0x3C] */
-
-/* SP [0x3D..0x3E] */
-
-/* SREG [0x3F] */
-
-#define WDTCR _SFR_MEM8(0x60)
-#define WDE 3
-#define WDCE 4
-#define WDP0 0
-#define WDP1 1
-#define WDP2 2
-#define WDP3 5
-#define WDIE 6
-#define WDIF 7
-
-#define CLKPR _SFR_MEM8(0x61)
-#define CLKPS0 0
-#define CLKPS1 1
-#define CLKPS2 2
-#define CLKPS3 3
-#define CLKPCE 7
-
-#define CLKCSR _SFR_MEM8(0x62)
-#define CLKC0 0
-#define CLKC1 1
-#define CLKC2 2
-#define CLKC3 3
-#define CLKRDY 4
-#define CLKCCE 7
-
-#define CLKSELR _SFR_MEM8(0x63)
-#define CSEL0 0
-#define CSEL1 1
-#define CSEL2 2
-#define CSEL3 3
-#define CSUT0 4
-#define CSUT1 5
-#define COUT 6
-
-#define PRR _SFR_MEM8(0x64)
-#define PRADC 0
-#define PRUSI 1
-#define PRTIM0 2
-#define PRTIM1 3
-#define PRSPI 4
-#define PRLIN 5
-
-/* Reserved [0x65] */
-
-#define OSCCAL _SFR_MEM8(0x66)
-#define OSCCAL0 0
-#define OSCCAL1 1
-#define OSCCAL2 2
-#define OSCCAL3 3
-#define OSCCAL4 4
-#define OSCCAL5 5
-#define OSCCAL6 6
-#define OSCCAL7 7
-
-/* Reserved [0x67] */
-
-#define PCICR _SFR_MEM8(0x68)
-#define PCIE0 0
-#define PCIE1 1
-
-#define EICRA _SFR_MEM8(0x69)
-#define ISC00 0
-#define ISC01 1
-#define ISC10 2
-#define ISC11 3
-
-/* Reserved [0x6A] */
-
-#define PCMSK0 _SFR_MEM8(0x6B)
-#define PCINT0 0
-#define PCINT1 1
-#define PCINT2 2
-#define PCINT3 3
-#define PCINT4 4
-#define PCINT5 5
-#define PCINT6 6
-#define PCINT7 7
-
-#define PCMSK1 _SFR_MEM8(0x6C)
-#define PCINT8 0
-#define PCINT9 1
-#define PCINT10 2
-#define PCINT11 3
-#define PCINT12 4
-#define PCINT13 5
-#define PCINT14 6
-#define PCINT15 7
-
-/* Reserved [0x6D] */
-
-#define TIMSK0 _SFR_MEM8(0x6E)
-#define TOIE0 0
-#define OCIE0A 1
-
-#define TIMSK1 _SFR_MEM8(0x6F)
-#define TOIE1 0
-#define OCIE1A 1
-#define OCIE1B 2
-#define ICIE1 5
-
-/* Reserved [0x70..0x76] */
-
-#define AMISCR _SFR_MEM8(0x77)
-#define XREFEN 1
-#define AREFEN 2
-#define ISRCEN 0
-
-/* Combine ADCL and ADCH */
-#ifndef __ASSEMBLER__
-#define ADC _SFR_MEM16(0x78)
-#endif
-#define ADCW _SFR_MEM16(0x78)
-
-#define ADCL _SFR_MEM8(0x78)
-#define ADCH _SFR_MEM8(0x79)
-
-#define ADCSRA _SFR_MEM8(0x7A)
-#define ADPS0 0
-#define ADPS1 1
-#define ADPS2 2
-#define ADIE 3
-#define ADIF 4
-#define ADATE 5
-#define ADSC 6
-#define ADEN 7
-
-#define ADCSRB _SFR_MEM8(0x7B)
-#define ADTS0 0
-#define ADTS1 1
-#define ADTS2 2
-#define BIN 7
-#define ACIR0 4
-#define ACIR1 5
-#define ACME 6
-
-#define ADMUX _SFR_MEM8(0x7C)
-#define MUX0 0
-#define MUX1 1
-#define MUX2 2
-#define MUX3 3
-#define MUX4 4
-#define ADLAR 5
-#define REFS0 6
-#define REFS1 7
-
-/* Reserved [0x7D] */
-
-#define DIDR0 _SFR_MEM8(0x7E)
-#define ADC0D 0
-#define ADC1D 1
-#define ADC2D 2
-#define ADC3D 3
-#define ADC4D 4
-#define ADC5D 5
-#define ADC6D 6
-#define ADC7D 7
-
-#define DIDR1 _SFR_MEM8(0x7F)
-#define ADC8D 0
-#define ADC9D 1
-#define ADC10D 2
-
-#define TCCR1A _SFR_MEM8(0x80)
-#define WGM10 0
-#define WGM11 1
-#define COM1B0 4
-#define COM1B1 5
-#define COM1A0 6
-#define COM1A1 7
-
-#define TCCR1B _SFR_MEM8(0x81)
-#define CS10 0
-#define CS11 1
-#define CS12 2
-#define WGM12 3
-#define WGM13 4
-#define ICES1 6
-#define ICNC1 7
-
-#define TCCR1C _SFR_MEM8(0x82)
-#define FOC1B 6
-#define FOC1A 7
-
-#define TCCR1D _SFR_MEM8(0x83)
-#define OC1AU 0
-#define OC1AV 1
-#define OC1AW 2
-#define OC1AX 3
-#define OC1BU 4
-#define OC1BV 5
-#define OC1BW 6
-#define OC1BX 7
-
-/* Combine TCNT1L and TCNT1H */
-#define TCNT1 _SFR_MEM16(0x84)
-
-#define TCNT1L _SFR_MEM8(0x84)
-#define TCNT1H _SFR_MEM8(0x85)
-
-/* Combine ICR1L and ICR1H */
-#define ICR1 _SFR_MEM16(0x86)
-
-#define ICR1L _SFR_MEM8(0x86)
-#define ICR1H _SFR_MEM8(0x87)
-
-/* Combine OCR1AL and OCR1AH */
-#define OCR1A _SFR_MEM16(0x88)
-
-#define OCR1AL _SFR_MEM8(0x88)
-#define OCR1AH _SFR_MEM8(0x89)
-
-/* Combine OCR1BL and OCR1BH */
-#define OCR1B _SFR_MEM16(0x8A)
-
-#define OCR1BL _SFR_MEM8(0x8A)
-#define OCR1BH _SFR_MEM8(0x8B)
-
-/* Reserved [0x8C..0xB5] */
-
-#define ASSR _SFR_MEM8(0xB6)
-#define TCR0BUB 0
-#define TCR0AUB 1
-#define OCR0AUB 3
-#define TCN0UB 4
-#define AS0 5
-#define EXCLK 6
-
-/* Reserved [0xB7] */
-
-#define USICR _SFR_MEM8(0xB8)
-#define USITC 0
-#define USICLK 1
-#define USICS0 2
-#define USICS1 3
-#define USIWM0 4
-#define USIWM1 5
-#define USIOIE 6
-#define USISIE 7
-
-#define USISR _SFR_MEM8(0xB9)
-#define USICNT0 0
-#define USICNT1 1
-#define USICNT2 2
-#define USICNT3 3
-#define USIDC 4
-#define USIPF 5
-#define USIOIF 6
-#define USISIF 7
-
-#define USIDR _SFR_MEM8(0xBA)
-
-#define USIBR _SFR_MEM8(0xBB)
-
-#define USIPP _SFR_MEM8(0xBC)
-
-/* Reserved [0xBD..0xC7] */
-
-#define LINCR _SFR_MEM8(0xC8)
-#define LCMD0 0
-#define LCMD1 1
-#define LCMD2 2
-#define LENA 3
-#define LCONF0 4
-#define LCONF1 5
-#define LIN13 6
-#define LSWRES 7
-
-#define LINSIR _SFR_MEM8(0xC9)
-#define LRXOK 0
-#define LTXOK 1
-#define LIDOK 2
-#define LERR 3
-#define LBUSY 4
-#define LIDST0 5
-#define LIDST1 6
-#define LIDST2 7
-
-#define LINENIR _SFR_MEM8(0xCA)
-#define LENRXOK 0
-#define LENTXOK 1
-#define LENIDOK 2
-#define LENERR 3
-
-#define LINERR _SFR_MEM8(0xCB)
-#define LBERR 0
-#define LCERR 1
-#define LPERR 2
-#define LSERR 3
-#define LFERR 4
-#define LOVERR 5
-#define LTOERR 6
-#define LABORT 7
-
-#define LINBTR _SFR_MEM8(0xCC)
-#define LBT0 0
-#define LBT1 1
-#define LBT2 2
-#define LBT3 3
-#define LBT4 4
-#define LBT5 5
-#define LDISR 7
-
-#define LINBRRL _SFR_MEM8(0xCD)
-#define LDIV0 0
-#define LDIV1 1
-#define LDIV2 2
-#define LDIV3 3
-#define LDIV4 4
-#define LDIV5 5
-#define LDIV6 6
-#define LDIV7 7
-
-#define LINBRRH _SFR_MEM8(0xCE)
-#define LDIV8 0
-#define LDIV9 1
-#define LDIV10 2
-#define LDIV11 3
-
-#define LINDLR _SFR_MEM8(0xCF)
-#define LRXDL0 0
-#define LRXDL1 1
-#define LRXDL2 2
-#define LRXDL3 3
-#define LTXDL0 4
-#define LTXDL1 5
-#define LTXDL2 6
-#define LTXDL3 7
-
-#define LINIDR _SFR_MEM8(0xD0)
-#define LID0 0
-#define LID1 1
-#define LID2 2
-#define LID3 3
-#define LID4 4
-#define LID5 5
-#define LP0 6
-#define LP1 7
-
-#define LINSEL _SFR_MEM8(0xD1)
-#define LINDX0 0
-#define LINDX1 1
-#define LINDX2 2
-#define LAINC 3
-
-#define LINDAT _SFR_MEM8(0xD2)
-#define LDATA0 0
-#define LDATA1 1
-#define LDATA2 2
-#define LDATA3 3
-#define LDATA4 4
-#define LDATA5 5
-#define LDATA6 6
-#define LDATA7 7
-
-
-
-/* Interrupt vectors */
-/* Vector 0 is the reset vector */
-/* External Interrupt Request 0 */
-#define INT0_vect _VECTOR(1)
-#define INT0_vect_num 1
-
-/* External Interrupt Request 1 */
-#define INT1_vect _VECTOR(2)
-#define INT1_vect_num 2
-
-/* Pin Change Interrupt Request 0 */
-#define PCINT0_vect _VECTOR(3)
-#define PCINT0_vect_num 3
-
-/* Pin Change Interrupt Request 1 */
-#define PCINT1_vect _VECTOR(4)
-#define PCINT1_vect_num 4
-
-/* Watchdog Time-Out Interrupt */
-#define WDT_vect _VECTOR(5)
-#define WDT_vect_num 5
-
-/* Timer/Counter1 Capture Event */
-#define TIMER1_CAPT_vect _VECTOR(6)
-#define TIMER1_CAPT_vect_num 6
-
-/* Timer/Counter1 Compare Match 1A */
-#define TIMER1_COMPA_vect _VECTOR(7)
-#define TIMER1_COMPA_vect_num 7
-
-/* Timer/Counter1 Compare Match 1B */
-#define TIMER1_COMPB_vect _VECTOR(8)
-#define TIMER1_COMPB_vect_num 8
-
-/* Timer/Counter1 Overflow */
-#define TIMER1_OVF_vect _VECTOR(9)
-#define TIMER1_OVF_vect_num 9
-
-/* Timer/Counter0 Compare Match 0A */
-#define TIMER0_COMPA_vect _VECTOR(10)
-#define TIMER0_COMPA_vect_num 10
-
-/* Timer/Counter0 Overflow */
-#define TIMER0_OVF_vect _VECTOR(11)
-#define TIMER0_OVF_vect_num 11
-
-/* LIN Transfer Complete */
-#define LIN_TC_vect _VECTOR(12)
-#define LIN_TC_vect_num 12
-
-/* LIN Error */
-#define LIN_ERR_vect _VECTOR(13)
-#define LIN_ERR_vect_num 13
-
-/* SPI Serial Transfer Complete */
-#define SPI_STC_vect _VECTOR(14)
-#define SPI_STC_vect_num 14
-
-/* ADC Conversion Complete */
-#define ADC_vect _VECTOR(15)
-#define ADC_vect_num 15
-
-/* EEPROM Ready */
-#define EE_RDY_vect _VECTOR(16)
-#define EE_RDY_vect_num 16
-
-/* Analog Comparator */
-#define ANA_COMP_vect _VECTOR(17)
-#define ANA_COMP_vect_num 17
-
-/* USI Start */
-#define USI_START_vect _VECTOR(18)
-#define USI_START_vect_num 18
-
-/* USI Overflow */
-#define USI_OVF_vect _VECTOR(19)
-#define USI_OVF_vect_num 19
-
-#define _VECTORS_SIZE 80
-
-
-/* Constants */
-
-#define SPM_PAGESIZE 128
-#define FLASHSTART 0x0000
-#define FLASHEND 0x3FFF
-#define RAMSTART 0x0100
-#define RAMSIZE 512
-#define RAMEND 0x02FF
-#define E2START 0
-#define E2SIZE 512
-#define E2PAGESIZE 4
-#define E2END 0x01FF
-#define XRAMEND RAMEND
-
-
-/* Fuses */
-
-#define FUSE_MEMORY_SIZE 3
-
-/* Low Fuse Byte */
-#define FUSE_SUT_CKSEL0 (unsigned char)~_BV(0)
-#define FUSE_SUT_CKSEL1 (unsigned char)~_BV(1)
-#define FUSE_SUT_CKSEL2 (unsigned char)~_BV(2)
-#define FUSE_SUT_CKSEL3 (unsigned char)~_BV(3)
-#define FUSE_SUT_CKSEL4 (unsigned char)~_BV(4)
-#define FUSE_SUT_CKSEL5 (unsigned char)~_BV(5)
-#define FUSE_CKOUT (unsigned char)~_BV(6)
-#define FUSE_CKDIV8 (unsigned char)~_BV(7)
-
-/* High Fuse Byte */
-#define FUSE_BODLEVEL0 (unsigned char)~_BV(0)
-#define FUSE_BODLEVEL1 (unsigned char)~_BV(1)
-#define FUSE_BODLEVEL2 (unsigned char)~_BV(2)
-#define FUSE_EESAVE (unsigned char)~_BV(3)
-#define FUSE_WDTON (unsigned char)~_BV(4)
-#define FUSE_SPIEN (unsigned char)~_BV(5)
-#define FUSE_DWEN (unsigned char)~_BV(6)
-#define FUSE_RSTDISBL (unsigned char)~_BV(7)
-
-/* Extended Fuse Byte */
-#define FUSE_SELFPRGEN (unsigned char)~_BV(0)
-
-
-/* Lock Bits */
-#define __LOCK_BITS_EXIST
-
-
-/* Signature */
-#define SIGNATURE_0 0x1E
-#define SIGNATURE_1 0x94
-#define SIGNATURE_2 0x87
-
-
-#endif /* #ifdef _AVR_ATA5505_H_INCLUDED */
-
+/*****************************************************************************
+ *
+ * Copyright (C) 2014 Atmel Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in
+ * the documentation and/or other materials provided with the
+ * distribution.
+ *
+ * * Neither the name of the copyright holders nor the names of
+ * contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ ****************************************************************************/
+
+
+#ifndef _AVR_ATA5505_H_INCLUDED
+#define _AVR_ATA5505_H_INCLUDED
+
+
+#ifndef _AVR_IO_H_
+# error "Include <avr/io.h> instead of this file."
+#endif
+
+#ifndef _AVR_IOXXX_H_
+# define _AVR_IOXXX_H_ "ioa5505.h"
+#else
+# error "Attempt to include more than one <avr/ioXXX.h> file."
+#endif
+
+/* Registers and associated bit numbers */
+
+#define PINA _SFR_IO8(0x00)
+#define PINA7 7
+#define PINA6 6
+#define PINA5 5
+#define PINA4 4
+#define PINA3 3
+#define PINA2 2
+#define PINA1 1
+#define PINA0 0
+
+#define DDRA _SFR_IO8(0x01)
+#define DDRA7 7
+#define DDRA6 6
+#define DDRA5 5
+#define DDRA4 4
+#define DDRA3 3
+#define DDRA2 2
+#define DDRA1 1
+#define DDRA0 0
+
+#define PORTA _SFR_IO8(0x02)
+#define PORTA7 7
+#define PORTA6 6
+#define PORTA5 5
+#define PORTA4 4
+#define PORTA3 3
+#define PORTA2 2
+#define PORTA1 1
+#define PORTA0 0
+
+#define PINB _SFR_IO8(0x03)
+#define PINB7 7
+#define PINB6 6
+#define PINB5 5
+#define PINB4 4
+#define PINB3 3
+#define PINB2 2
+#define PINB1 1
+#define PINB0 0
+
+#define DDRB _SFR_IO8(0x04)
+#define DDRB7 7
+#define DDRB6 6
+#define DDRB5 5
+#define DDRB4 4
+#define DDRB3 3
+#define DDRB2 2
+#define DDRB1 1
+#define DDRB0 0
+
+#define PORTB _SFR_IO8(0x05)
+#define PORTB7 7
+#define PORTB6 6
+#define PORTB5 5
+#define PORTB4 4
+#define PORTB3 3
+#define PORTB2 2
+#define PORTB1 1
+#define PORTB0 0
+
+/* Reserved [0x06..0x11] */
+
+#define PORTCR _SFR_IO8(0x12)
+
+/* Reserved [0x13..0x14] */
+
+#define TIFR0 _SFR_IO8(0x15)
+#define TOV0 0
+#define OCF0A 1
+
+#define TIFR1 _SFR_IO8(0x16)
+#define TOV1 0
+#define OCF1A 1
+#define OCF1B 2
+#define ICF1 5
+
+/* Reserved [0x17..0x1A] */
+
+#define PCIFR _SFR_IO8(0x1B)
+#define PCIF0 0
+#define PCIF1 1
+
+#define EIFR _SFR_IO8(0x1C)
+#define INTF0 0
+#define INTF1 1
+
+#define EIMSK _SFR_IO8(0x1D)
+#define INT0 0
+#define INT1 1
+
+#define GPIOR0 _SFR_IO8(0x1E)
+
+#define EECR _SFR_IO8(0x1F)
+#define EERE 0
+#define EEPE 1
+#define EEMPE 2
+#define EERIE 3
+#define EEPM0 4
+#define EEPM1 5
+
+#define EEDR _SFR_IO8(0x20)
+
+/* Combine EEARL and EEARH */
+#define EEAR _SFR_IO16(0x21)
+
+#define EEARL _SFR_IO8(0x21)
+#define EEARH _SFR_IO8(0x22)
+
+#define GTCCR _SFR_IO8(0x23)
+#define PSR1 0
+#define PSR0 1
+#define TSM 7
+
+/* Reserved [0x24] */
+
+#define TCCR0A _SFR_IO8(0x25)
+#define WGM00 0
+#define WGM01 1
+#define COM0A0 6
+#define COM0A1 7
+
+#define TCCR0B _SFR_IO8(0x26)
+#define CS00 0
+#define CS01 1
+#define CS02 2
+#define FOC0A 7
+
+#define TCNT2 _SFR_IO8(0x27)
+
+#define OCR0A _SFR_IO8(0x28)
+
+/* Reserved [0x29] */
+
+#define GPIOR1 _SFR_IO8(0x2A)
+
+#define GPIOR2 _SFR_IO8(0x2B)
+
+#define SPCR _SFR_IO8(0x2C)
+#define SPR0 0
+#define SPR1 1
+#define CPHA 2
+#define CPOL 3
+#define MSTR 4
+#define DORD 5
+#define SPE 6
+#define SPIE 7
+
+#define SPSR _SFR_IO8(0x2D)
+#define SPI2X 0
+#define WCOL 6
+#define SPIF 7
+
+#define SPDR _SFR_IO8(0x2E)
+
+/* Reserved [0x2F] */
+
+#define ACSR _SFR_IO8(0x30)
+#define ACIS0 0
+#define ACIS1 1
+#define ACIC 2
+#define ACIE 3
+#define ACI 4
+#define ACO 5
+#define ACIRS 6
+#define ACD 7
+
+#define DWDR _SFR_IO8(0x31)
+
+/* Reserved [0x32] */
+
+#define SMCR _SFR_IO8(0x33)
+#define SE 0
+#define SM0 1
+#define SM1 2
+
+#define MCUSR _SFR_IO8(0x34)
+#define PORF 0
+#define EXTRF 1
+#define BORF 2
+#define WDRF 3
+
+#define MCUCR _SFR_IO8(0x35)
+#define PUD 4
+#define BODS 5
+#define BODSE 6
+
+/* Reserved [0x36] */
+
+#define SPMCSR _SFR_IO8(0x37)
+#define SPMEN 0
+#define PGERS 1
+#define PGWRT 2
+#define RFLB 3
+#define CTPB 4
+#define SIGRD 5
+#define RWWSB 6
+
+/* Reserved [0x38..0x3C] */
+
+/* SP [0x3D..0x3E] */
+
+/* SREG [0x3F] */
+
+#define WDTCR _SFR_MEM8(0x60)
+#define WDE 3
+#define WDCE 4
+#define WDP0 0
+#define WDP1 1
+#define WDP2 2
+#define WDP3 5
+#define WDIE 6
+#define WDIF 7
+
+#define CLKPR _SFR_MEM8(0x61)
+#define CLKPS0 0
+#define CLKPS1 1
+#define CLKPS2 2
+#define CLKPS3 3
+#define CLKPCE 7
+
+#define CLKCSR _SFR_MEM8(0x62)
+#define CLKC0 0
+#define CLKC1 1
+#define CLKC2 2
+#define CLKC3 3
+#define CLKRDY 4
+#define CLKCCE 7
+
+#define CLKSELR _SFR_MEM8(0x63)
+#define CSEL0 0
+#define CSEL1 1
+#define CSEL2 2
+#define CSEL3 3
+#define CSUT0 4
+#define CSUT1 5
+#define COUT 6
+
+#define PRR _SFR_MEM8(0x64)
+#define PRADC 0
+#define PRUSI 1
+#define PRTIM0 2
+#define PRTIM1 3
+#define PRSPI 4
+#define PRLIN 5
+
+/* Reserved [0x65] */
+
+#define OSCCAL _SFR_MEM8(0x66)
+#define OSCCAL0 0
+#define OSCCAL1 1
+#define OSCCAL2 2
+#define OSCCAL3 3
+#define OSCCAL4 4
+#define OSCCAL5 5
+#define OSCCAL6 6
+#define OSCCAL7 7
+
+/* Reserved [0x67] */
+
+#define PCICR _SFR_MEM8(0x68)
+#define PCIE0 0
+#define PCIE1 1
+
+#define EICRA _SFR_MEM8(0x69)
+#define ISC00 0
+#define ISC01 1
+#define ISC10 2
+#define ISC11 3
+
+/* Reserved [0x6A] */
+
+#define PCMSK0 _SFR_MEM8(0x6B)
+#define PCINT0 0
+#define PCINT1 1
+#define PCINT2 2
+#define PCINT3 3
+#define PCINT4 4
+#define PCINT5 5
+#define PCINT6 6
+#define PCINT7 7
+
+#define PCMSK1 _SFR_MEM8(0x6C)
+#define PCINT8 0
+#define PCINT9 1
+#define PCINT10 2
+#define PCINT11 3
+#define PCINT12 4
+#define PCINT13 5
+#define PCINT14 6
+#define PCINT15 7
+
+/* Reserved [0x6D] */
+
+#define TIMSK0 _SFR_MEM8(0x6E)
+#define TOIE0 0
+#define OCIE0A 1
+
+#define TIMSK1 _SFR_MEM8(0x6F)
+#define TOIE1 0
+#define OCIE1A 1
+#define OCIE1B 2
+#define ICIE1 5
+
+/* Reserved [0x70..0x76] */
+
+#define AMISCR _SFR_MEM8(0x77)
+#define XREFEN 1
+#define AREFEN 2
+#define ISRCEN 0
+
+/* Combine ADCL and ADCH */
+#ifndef __ASSEMBLER__
+#define ADC _SFR_MEM16(0x78)
+#endif
+#define ADCW _SFR_MEM16(0x78)
+
+#define ADCL _SFR_MEM8(0x78)
+#define ADCH _SFR_MEM8(0x79)
+
+#define ADCSRA _SFR_MEM8(0x7A)
+#define ADPS0 0
+#define ADPS1 1
+#define ADPS2 2
+#define ADIE 3
+#define ADIF 4
+#define ADATE 5
+#define ADSC 6
+#define ADEN 7
+
+#define ADCSRB _SFR_MEM8(0x7B)
+#define ADTS0 0
+#define ADTS1 1
+#define ADTS2 2
+#define BIN 7
+#define ACIR0 4
+#define ACIR1 5
+#define ACME 6
+
+#define ADMUX _SFR_MEM8(0x7C)
+#define MUX0 0
+#define MUX1 1
+#define MUX2 2
+#define MUX3 3
+#define MUX4 4
+#define ADLAR 5
+#define REFS0 6
+#define REFS1 7
+
+/* Reserved [0x7D] */
+
+#define DIDR0 _SFR_MEM8(0x7E)
+#define ADC0D 0
+#define ADC1D 1
+#define ADC2D 2
+#define ADC3D 3
+#define ADC4D 4
+#define ADC5D 5
+#define ADC6D 6
+#define ADC7D 7
+
+#define DIDR1 _SFR_MEM8(0x7F)
+#define ADC8D 0
+#define ADC9D 1
+#define ADC10D 2
+
+#define TCCR1A _SFR_MEM8(0x80)
+#define WGM10 0
+#define WGM11 1
+#define COM1B0 4
+#define COM1B1 5
+#define COM1A0 6
+#define COM1A1 7
+
+#define TCCR1B _SFR_MEM8(0x81)
+#define CS10 0
+#define CS11 1
+#define CS12 2
+#define WGM12 3
+#define WGM13 4
+#define ICES1 6
+#define ICNC1 7
+
+#define TCCR1C _SFR_MEM8(0x82)
+#define FOC1B 6
+#define FOC1A 7
+
+#define TCCR1D _SFR_MEM8(0x83)
+#define OC1AU 0
+#define OC1AV 1
+#define OC1AW 2
+#define OC1AX 3
+#define OC1BU 4
+#define OC1BV 5
+#define OC1BW 6
+#define OC1BX 7
+
+/* Combine TCNT1L and TCNT1H */
+#define TCNT1 _SFR_MEM16(0x84)
+
+#define TCNT1L _SFR_MEM8(0x84)
+#define TCNT1H _SFR_MEM8(0x85)
+
+/* Combine ICR1L and ICR1H */
+#define ICR1 _SFR_MEM16(0x86)
+
+#define ICR1L _SFR_MEM8(0x86)
+#define ICR1H _SFR_MEM8(0x87)
+
+/* Combine OCR1AL and OCR1AH */
+#define OCR1A _SFR_MEM16(0x88)
+
+#define OCR1AL _SFR_MEM8(0x88)
+#define OCR1AH _SFR_MEM8(0x89)
+
+/* Combine OCR1BL and OCR1BH */
+#define OCR1B _SFR_MEM16(0x8A)
+
+#define OCR1BL _SFR_MEM8(0x8A)
+#define OCR1BH _SFR_MEM8(0x8B)
+
+/* Reserved [0x8C..0xB5] */
+
+#define ASSR _SFR_MEM8(0xB6)
+#define TCR0BUB 0
+#define TCR0AUB 1
+#define OCR0AUB 3
+#define TCN0UB 4
+#define AS0 5
+#define EXCLK 6
+
+/* Reserved [0xB7] */
+
+#define USICR _SFR_MEM8(0xB8)
+#define USITC 0
+#define USICLK 1
+#define USICS0 2
+#define USICS1 3
+#define USIWM0 4
+#define USIWM1 5
+#define USIOIE 6
+#define USISIE 7
+
+#define USISR _SFR_MEM8(0xB9)
+#define USICNT0 0
+#define USICNT1 1
+#define USICNT2 2
+#define USICNT3 3
+#define USIDC 4
+#define USIPF 5
+#define USIOIF 6
+#define USISIF 7
+
+#define USIDR _SFR_MEM8(0xBA)
+
+#define USIBR _SFR_MEM8(0xBB)
+
+#define USIPP _SFR_MEM8(0xBC)
+
+/* Reserved [0xBD..0xC7] */
+
+#define LINCR _SFR_MEM8(0xC8)
+#define LCMD0 0
+#define LCMD1 1
+#define LCMD2 2
+#define LENA 3
+#define LCONF0 4
+#define LCONF1 5
+#define LIN13 6
+#define LSWRES 7
+
+#define LINSIR _SFR_MEM8(0xC9)
+#define LRXOK 0
+#define LTXOK 1
+#define LIDOK 2
+#define LERR 3
+#define LBUSY 4
+#define LIDST0 5
+#define LIDST1 6
+#define LIDST2 7
+
+#define LINENIR _SFR_MEM8(0xCA)
+#define LENRXOK 0
+#define LENTXOK 1
+#define LENIDOK 2
+#define LENERR 3
+
+#define LINERR _SFR_MEM8(0xCB)
+#define LBERR 0
+#define LCERR 1
+#define LPERR 2
+#define LSERR 3
+#define LFERR 4
+#define LOVERR 5
+#define LTOERR 6
+#define LABORT 7
+
+#define LINBTR _SFR_MEM8(0xCC)
+#define LBT0 0
+#define LBT1 1
+#define LBT2 2
+#define LBT3 3
+#define LBT4 4
+#define LBT5 5
+#define LDISR 7
+
+#define LINBRRL _SFR_MEM8(0xCD)
+#define LDIV0 0
+#define LDIV1 1
+#define LDIV2 2
+#define LDIV3 3
+#define LDIV4 4
+#define LDIV5 5
+#define LDIV6 6
+#define LDIV7 7
+
+#define LINBRRH _SFR_MEM8(0xCE)
+#define LDIV8 0
+#define LDIV9 1
+#define LDIV10 2
+#define LDIV11 3
+
+#define LINDLR _SFR_MEM8(0xCF)
+#define LRXDL0 0
+#define LRXDL1 1
+#define LRXDL2 2
+#define LRXDL3 3
+#define LTXDL0 4
+#define LTXDL1 5
+#define LTXDL2 6
+#define LTXDL3 7
+
+#define LINIDR _SFR_MEM8(0xD0)
+#define LID0 0
+#define LID1 1
+#define LID2 2
+#define LID3 3
+#define LID4 4
+#define LID5 5
+#define LP0 6
+#define LP1 7
+
+#define LINSEL _SFR_MEM8(0xD1)
+#define LINDX0 0
+#define LINDX1 1
+#define LINDX2 2
+#define LAINC 3
+
+#define LINDAT _SFR_MEM8(0xD2)
+#define LDATA0 0
+#define LDATA1 1
+#define LDATA2 2
+#define LDATA3 3
+#define LDATA4 4
+#define LDATA5 5
+#define LDATA6 6
+#define LDATA7 7
+
+
+
+/* Interrupt vectors */
+/* Vector 0 is the reset vector */
+/* External Interrupt Request 0 */
+#define INT0_vect _VECTOR(1)
+#define INT0_vect_num 1
+
+/* External Interrupt Request 1 */
+#define INT1_vect _VECTOR(2)
+#define INT1_vect_num 2
+
+/* Pin Change Interrupt Request 0 */
+#define PCINT0_vect _VECTOR(3)
+#define PCINT0_vect_num 3
+
+/* Pin Change Interrupt Request 1 */
+#define PCINT1_vect _VECTOR(4)
+#define PCINT1_vect_num 4
+
+/* Watchdog Time-Out Interrupt */
+#define WDT_vect _VECTOR(5)
+#define WDT_vect_num 5
+
+/* Timer/Counter1 Capture Event */
+#define TIMER1_CAPT_vect _VECTOR(6)
+#define TIMER1_CAPT_vect_num 6
+
+/* Timer/Counter1 Compare Match 1A */
+#define TIMER1_COMPA_vect _VECTOR(7)
+#define TIMER1_COMPA_vect_num 7
+
+/* Timer/Counter1 Compare Match 1B */
+#define TIMER1_COMPB_vect _VECTOR(8)
+#define TIMER1_COMPB_vect_num 8
+
+/* Timer/Counter1 Overflow */
+#define TIMER1_OVF_vect _VECTOR(9)
+#define TIMER1_OVF_vect_num 9
+
+/* Timer/Counter0 Compare Match 0A */
+#define TIMER0_COMPA_vect _VECTOR(10)
+#define TIMER0_COMPA_vect_num 10
+
+/* Timer/Counter0 Overflow */
+#define TIMER0_OVF_vect _VECTOR(11)
+#define TIMER0_OVF_vect_num 11
+
+/* LIN Transfer Complete */
+#define LIN_TC_vect _VECTOR(12)
+#define LIN_TC_vect_num 12
+
+/* LIN Error */
+#define LIN_ERR_vect _VECTOR(13)
+#define LIN_ERR_vect_num 13
+
+/* SPI Serial Transfer Complete */
+#define SPI_STC_vect _VECTOR(14)
+#define SPI_STC_vect_num 14
+
+/* ADC Conversion Complete */
+#define ADC_vect _VECTOR(15)
+#define ADC_vect_num 15
+
+/* EEPROM Ready */
+#define EE_RDY_vect _VECTOR(16)
+#define EE_RDY_vect_num 16
+
+/* Analog Comparator */
+#define ANA_COMP_vect _VECTOR(17)
+#define ANA_COMP_vect_num 17
+
+/* USI Start */
+#define USI_START_vect _VECTOR(18)
+#define USI_START_vect_num 18
+
+/* USI Overflow */
+#define USI_OVF_vect _VECTOR(19)
+#define USI_OVF_vect_num 19
+
+#define _VECTORS_SIZE 80
+
+
+/* Constants */
+
+#define SPM_PAGESIZE 128
+#define FLASHSTART 0x0000
+#define FLASHEND 0x3FFF
+#define RAMSTART 0x0100
+#define RAMSIZE 512
+#define RAMEND 0x02FF
+#define E2START 0
+#define E2SIZE 512
+#define E2PAGESIZE 4
+#define E2END 0x01FF
+#define XRAMEND RAMEND
+
+
+/* Fuses */
+
+#define FUSE_MEMORY_SIZE 3
+
+/* Low Fuse Byte */
+#define FUSE_SUT_CKSEL0 (unsigned char)~_BV(0)
+#define FUSE_SUT_CKSEL1 (unsigned char)~_BV(1)
+#define FUSE_SUT_CKSEL2 (unsigned char)~_BV(2)
+#define FUSE_SUT_CKSEL3 (unsigned char)~_BV(3)
+#define FUSE_SUT_CKSEL4 (unsigned char)~_BV(4)
+#define FUSE_SUT_CKSEL5 (unsigned char)~_BV(5)
+#define FUSE_CKOUT (unsigned char)~_BV(6)
+#define FUSE_CKDIV8 (unsigned char)~_BV(7)
+
+/* High Fuse Byte */
+#define FUSE_BODLEVEL0 (unsigned char)~_BV(0)
+#define FUSE_BODLEVEL1 (unsigned char)~_BV(1)
+#define FUSE_BODLEVEL2 (unsigned char)~_BV(2)
+#define FUSE_EESAVE (unsigned char)~_BV(3)
+#define FUSE_WDTON (unsigned char)~_BV(4)
+#define FUSE_SPIEN (unsigned char)~_BV(5)
+#define FUSE_DWEN (unsigned char)~_BV(6)
+#define FUSE_RSTDISBL (unsigned char)~_BV(7)
+
+/* Extended Fuse Byte */
+#define FUSE_SELFPRGEN (unsigned char)~_BV(0)
+
+
+/* Lock Bits */
+#define __LOCK_BITS_EXIST
+
+
+/* Signature */
+#define SIGNATURE_0 0x1E
+#define SIGNATURE_1 0x94
+#define SIGNATURE_2 0x87
+
+
+#endif /* #ifdef _AVR_ATA5505_H_INCLUDED */
+
Property changes on: trunk/avr-libc/include/avr/ioa5505.h
___________________________________________________________________
Added: svn:mime-type
+ text/plain
Added: svn:keywords
+ Author Id Date
Added: svn:eol-style
+ native
Modified: trunk/avr-libc/include/avr/ioa5790.h
===================================================================
--- trunk/avr-libc/include/avr/ioa5790.h 2014-08-05 06:57:11 UTC (rev
2434)
+++ trunk/avr-libc/include/avr/ioa5790.h 2014-08-11 10:31:52 UTC (rev
2435)
@@ -1,834 +1,834 @@
-/*****************************************************************************
- *
- * Copyright (C) 2014 Atmel Corporation
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *
- * * Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- *
- * * Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- *
- * * Neither the name of the copyright holders nor the names of
- * contributors may be used to endorse or promote products derived
- * from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
- * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- ****************************************************************************/
-
-
-#ifndef _AVR_ATA5790_H_INCLUDED
-#define _AVR_ATA5790_H_INCLUDED
-
-
-#ifndef _AVR_IO_H_
-# error "Include <avr/io.h> instead of this file."
-#endif
-
-#ifndef _AVR_IOXXX_H_
-# define _AVR_IOXXX_H_ "ioa5790.h"
-#else
-# error "Attempt to include more than one <avr/ioXXX.h> file."
-#endif
-
-/* Registers and associated bit numbers */
-
-#define PINB _SFR_IO8(0x03)
-#define PINB7 7
-#define PINB6 6
-#define PINB5 5
-#define PINB4 4
-#define PINB3 3
-#define PINB2 2
-#define PINB1 1
-#define PINB0 0
-
-#define DDRB _SFR_IO8(0x04)
-#define DDRB7 7
-#define DDRB6 6
-#define DDRB5 5
-#define DDRB4 4
-#define DDRB3 3
-#define DDRB2 2
-#define DDRB1 1
-#define DDRB0 0
-
-#define PORTB _SFR_IO8(0x05)
-#define PORTB7 7
-#define PORTB6 6
-#define PORTB5 5
-#define PORTB4 4
-#define PORTB3 3
-#define PORTB2 2
-#define PORTB1 1
-#define PORTB0 0
-
-#define PINC _SFR_IO8(0x06)
-#define PINC7 7
-#define PINC6 6
-#define PINC5 5
-#define PINC4 4
-#define PINC3 3
-#define PINC2 2
-#define PINC1 1
-#define PINC0 0
-
-#define DDRC _SFR_IO8(0x07)
-#define DDRC7 7
-#define DDRC6 6
-#define DDRC5 5
-#define DDRC4 4
-#define DDRC3 3
-#define DDRC2 2
-#define DDRC1 1
-#define DDRC0 0
-
-#define PORTC _SFR_IO8(0x08)
-#define PORTC7 7
-#define PORTC6 6
-#define PORTC5 5
-#define PORTC4 4
-#define PORTC3 3
-#define PORTC2 2
-#define PORTC1 1
-#define PORTC0 0
-
-#define PIND _SFR_IO8(0x09)
-#define PIND7 7
-#define PIND6 6
-#define PIND5 5
-#define PIND4 4
-#define PIND3 3
-#define PIND2 2
-#define PIND1 1
-#define PIND0 0
-
-#define DDRD _SFR_IO8(0x0A)
-#define DDRD7 7
-#define DDRD6 6
-#define DDRD5 5
-#define DDRD4 4
-#define DDRD3 3
-#define DDRD2 2
-#define DDRD1 1
-#define DDRD0 0
-
-#define PORTD _SFR_IO8(0x0B)
-#define PORTD7 7
-#define PORTD6 6
-#define PORTD5 5
-#define PORTD4 4
-#define PORTD3 3
-#define PORTD2 2
-#define PORTD1 1
-#define PORTD0 0
-
-/* Reserved [0x0C] */
-
-#define TPCR _SFR_IO8(0x0D)
-#define TPMA 0
-#define TPMOD 1
-#define TPMS0 2
-#define TPMS1 3
-#define TPMD0 4
-#define TPMD1 5
-#define TPPSD 6
-#define TPD 7
-
-#define TPFR _SFR_IO8(0x0E)
-#define TPF 0
-#define TPA 1
-#define TPGAP 2
-#define TPPSW 3
-
-#define CMCR _SFR_IO8(0x0F)
-#define CMM0 0
-#define CMM1 1
-#define SRCD 2
-#define CO32D 3
-#define CCS 4
-#define ECINS 5
-#define CMONEN 6
-#define CMCCE 7
-
-#define CMSR _SFR_IO8(0x10)
-#define ECF 0
-#define SXF 1
-#define RTCF 2
-
-#define T2CR _SFR_IO8(0x11)
-#define T2OTM 0
-#define T2CTM 1
-#define T2CRM 2
-#define T2GRM 3
-#define T2TOP 4
-#define T2RES 5
-#define T2TS 6
-#define T2E 7
-
-#define T3CR _SFR_IO8(0x12)
-#define T3OTM 0
-#define T3CTM 1
-#define T3CRM 2
-#define T3CPRM 3
-#define T3TOP 4
-#define T3RES 5
-#define T3CPTM 6
-#define T3E 7
-
-#define AESCR _SFR_IO8(0x13)
-#define AESWK 0
-#define AESWD 1
-#define AESIM 2
-#define AESD 3
-#define AESXOR 4
-#define AESRES 5
-#define AESE 7
-
-#define AESSR _SFR_IO8(0x14)
-#define AESRF 0
-#define AESERF 7
-
-#define TMIFR _SFR_IO8(0x15)
-#define TMRXF 0
-#define TMTXF 1
-#define TMTCF 2
-#define TMRXS 3
-#define TMTXS 4
-
-#define VMSR _SFR_IO8(0x16)
-#define VMF 0
-
-#define PCIFR _SFR_IO8(0x17)
-#define PCIF0 0
-#define PCIF1 1
-
-#define LFFR _SFR_IO8(0x18)
-#define LFID0F 0
-#define LFID1F 1
-#define LFFEF 2
-#define LFDBF 3
-#define LFRSF 4
-#define LFSDF 5
-#define LFMDF 6
-#define LFCAF 7
-
-#define T0IFR _SFR_IO8(0x19)
-#define T0F 0
-
-#define T1IFR _SFR_IO8(0x1A)
-#define T1F 0
-
-#define T2IFR _SFR_IO8(0x1B)
-#define T2OFF 0
-#define T2COF 1
-
-#define T3IFR _SFR_IO8(0x1C)
-#define T3OFF 0
-#define T3COF 1
-#define T3ICF 2
-
-#define EIFR _SFR_IO8(0x1D)
-#define INTF0 0
-
-#define GPIOR _SFR_IO8(0x1E)
-
-#define EECR _SFR_IO8(0x1F)
-#define EERE 0
-#define EEWE 1
-#define EEMWE 2
-#define EERIE 3
-#define EEPM0 4
-#define EEPM1 5
-#define EELP 6
-
-#define EEDR _SFR_IO8(0x20)
-
-/* Combine EEARL and EEARH */
-#define EEAR _SFR_IO16(0x21)
-
-#define EEARL _SFR_IO8(0x21)
-#define EEARH _SFR_IO8(0x22)
-
-#define EEPR _SFR_IO8(0x23)
-#define EEAP0 0
-#define EEAP1 1
-#define EEAP2 2
-#define EEAP3 3
-
-#define EECCR _SFR_IO8(0x24)
-#define EEL0 0
-#define EEL1 1
-#define EEL2 2
-#define EEL3 3
-
-/* Reserved [0x25] */
-
-#define PCICR _SFR_IO8(0x26)
-#define PCIE0 0
-#define PCIE1 1
-
-#define EIMSK _SFR_IO8(0x27)
-#define INT0 0
-
-#define TMDR _SFR_IO8(0x28)
-
-#define AESDR _SFR_IO8(0x29)
-
-#define AESKR _SFR_IO8(0x2A)
-#define AESKR0 0
-#define AESKR1 1
-#define AESKR2 2
-#define AESKR3 3
-#define AESKR4 4
-#define AESKR5 5
-#define AESKR6 6
-#define AESKR7 7
-
-#define VMCR _SFR_IO8(0x2B)
-#define VMLS0 0
-#define VMLS1 1
-#define VMLS2 2
-#define VMLS3 3
-#define VMIM 4
-#define VMPS 5
-#define BODPD 6
-#define BODLS 7
-
-#define SPCR _SFR_IO8(0x2C)
-#define SPR0 0
-#define SPR1 1
-#define CPHA 2
-#define CPOL 3
-#define MSTR 4
-#define DORD 5
-#define SPE 6
-#define SPIE 7
-
-#define SPSR _SFR_IO8(0x2D)
-#define SPI2X 0
-#define WCOL 6
-#define SPIF 7
-
-#define SPDR _SFR_IO8(0x2E)
-
-#define LFCR0 _SFR_IO8(0x2F)
-#define LFCE1 0
-#define LFCE2 1
-#define LFCE3 2
-#define LFBRS 3
-#define LFRBS 4
-#define LFMG 5
-#define LFVC0 6
-#define LFVC1 7
-
-#define LFCR1 _SFR_IO8(0x30)
-#define LFM0 0
-#define LFM1 1
-#define LFFM0 2
-#define LFFM1 3
-#define LFRMS 4
-#define LFRMSA 5
-#define LFQCE 6
-#define LFRE 7
-
-/* Reserved [0x31] */
-
-#define LFRDB _SFR_IO8(0x32)
-
-#define SMCR _SFR_IO8(0x33)
-#define SE 0
-#define SM0 1
-#define SM1 2
-#define SM2 3
-
-#define MCUSR _SFR_IO8(0x34)
-#define PORF 0
-#define EXTRF 1
-#define BORF 2
-#define WDRF 3
-#define TPRF 5
-
-#define MCUCR _SFR_IO8(0x35)
-#define IVCE 0
-#define IVSEL 1
-#define PUD 4
-
-#define LFSR _SFR_IO8(0x36)
-#define LFES 0
-#define LFSD 1
-
-#define SPMCSR _SFR_IO8(0x37)
-#define SPMEN 0
-#define PGERS 1
-#define PGWRT 2
-#define BLBSET 3
-#define RWWSRE 4
-#define SIGRD 5
-#define RWWSB 6
-#define SPMIE 7
-
-#define T1CR _SFR_IO8(0x38)
-#define T1PS0 0
-#define T1PS1 1
-#define T1IE 2
-#define T1CS0 3
-#define T1CS1 4
-#define T1E 7
-
-#define T0CR _SFR_IO8(0x39)
-#define T0PS0 0
-#define T0PS1 1
-#define T0PS2 2
-#define T0IE 3
-#define T0PR 4
-
-/* Reserved [0x3A] */
-
-#define CMIMR _SFR_IO8(0x3B)
-#define ECIE 0
-#define SXIE 1
-#define RTCIE 2
-
-#define CLKPR _SFR_IO8(0x3C)
-#define CLKPS0 0
-#define CLKPS1 1
-#define CLKPS2 2
-#define CLTPS0 3
-#define CLTPS1 4
-#define CLTPS2 5
-#define CLKPCE 7
-
-/* SP [0x3D..0x3E] */
-
-/* SREG [0x3F] */
-
-#define WDTCR _SFR_MEM8(0x60)
-#define WDPS0 0
-#define WDPS1 1
-#define WDPS2 2
-#define WDE 3
-#define WDCE 4
-
-/* Reserved [0x61..0x62] */
-
-#define PRR0 _SFR_MEM8(0x63)
-#define PRLFR 0
-#define PRT1 1
-#define PRT2 2
-#define PRT3 3
-#define PRTM 4
-#define PRCU 5
-#define PRDS 6
-#define PRVM 7
-
-#define PRR1 _SFR_MEM8(0x64)
-#define PRCI 0
-#define PRSPI 1
-
-#define SRCCAL _SFR_MEM8(0x65)
-
-#define FRCCAL _SFR_MEM8(0x66)
-
-/* Reserved [0x67..0x68] */
-
-#define EICRA _SFR_MEM8(0x69)
-#define ISC00 0
-#define ISC01 1
-
-#define PCMSK0 _SFR_MEM8(0x6A)
-#define PCINT0 0
-#define PCINT1 1
-#define PCINT2 2
-#define PCINT3 3
-#define PCINT4 4
-#define PCINT5 5
-#define PCINT6 6
-#define PCINT7 7
-
-#define PCMSK1 _SFR_MEM8(0x6B)
-#define PCINT8 0
-#define PCINT9 1
-#define PCINT10 2
-#define PCINT11 3
-#define PCINT12 4
-#define PCINT13 5
-#define PCINT14 6
-#define PCINT15 7
-
-/* Reserved [0x6C] */
-
-#define LDCR _SFR_MEM8(0x6D)
-#define LDE 0
-#define LDCS0 1
-#define LDCS1 2
-
-/* Reserved [0x6E..0x6F] */
-
-#define T2CNT _SFR_MEM8(0x70)
-
-#define T2COR _SFR_MEM8(0x71)
-
-/* Reserved [0x72] */
-
-#define T2MR _SFR_MEM8(0x73)
-#define T2CS0 0
-#define T2CS1 1
-#define T2CS2 2
-#define T2PS0 3
-#define T2PS1 4
-#define T2PS2 5
-#define T2D0 6
-#define T2D1 7
-
-#define T2IMR _SFR_MEM8(0x74)
-#define T2OIM 0
-#define T2CIM 1
-
-/* Reserved [0x75] */
-
-#define T3CNT _SFR_MEM8(0x76)
-
-#define T3COR _SFR_MEM8(0x77)
-
-#define T3ICR _SFR_MEM8(0x78)
-
-#define T3MRA _SFR_MEM8(0x79)
-#define T3CS0 0
-#define T3CS1 1
-#define T3SCE 2
-#define T3CE0 3
-#define T3CE1 4
-#define T3CNC 5
-#define T3ICS0 6
-#define T3ICS1 7
-
-#define T3MRB _SFR_MEM8(0x7A)
-#define T3PS0 0
-#define T3PS1 1
-#define T3PS2 2
-
-#define T3IMR _SFR_MEM8(0x7B)
-#define T3OIM 0
-#define T3CIM 1
-#define T3CPIM 2
-
-/* Reserved [0x7C] */
-
-#define TMCR _SFR_MEM8(0x7D)
-#define MI1S0 0
-#define MI1S1 1
-#define MI2S0 2
-#define MI2S1 3
-#define MI4S0 4
-#define MI4S1 5
-#define TMCPOL 6
-#define TMSSIE 7
-
-#define TMMR _SFR_MEM8(0x7E)
-#define MOS0 0
-#define MOS1 1
-#define MSCS0 2
-#define MSCS1 3
-#define MOUTC 4
-#define TMMS0 5
-#define TMMS1 6
-#define TM12S 7
-
-#define TMIMR _SFR_MEM8(0x7F)
-#define TMRXIM 0
-#define TMTXIM 1
-#define TMTCIM 2
-
-/* Reserved [0x80..0x81] */
-
-#define LFIMR _SFR_MEM8(0x82)
-#define LFID0IM 0
-#define LFID1IM 1
-#define LFFEIM 2
-#define LFDBIM 3
-#define LFRSIM 4
-#define LFSDIM 5
-#define LFMDIM 6
-
-#define LFCAD _SFR_MEM8(0x83)
-
-#define LFID00 _SFR_MEM8(0x84)
-
-#define LFID01 _SFR_MEM8(0x85)
-
-#define LFID02 _SFR_MEM8(0x86)
-
-#define LFID03 _SFR_MEM8(0x87)
-
-#define LFID10 _SFR_MEM8(0x88)
-
-#define LFID11 _SFR_MEM8(0x89)
-
-#define LFID12 _SFR_MEM8(0x8A)
-
-#define LFID13 _SFR_MEM8(0x8B)
-
-#define LFRD0 _SFR_MEM8(0x8C)
-
-#define LFRD1 _SFR_MEM8(0x8D)
-
-#define LFRD2 _SFR_MEM8(0x8E)
-
-#define LFRD3 _SFR_MEM8(0x8F)
-
-#define LFID0M _SFR_MEM8(0x90)
-#define ID0FS0 0
-#define ID0FS1 1
-#define ID0FS2 2
-#define ID0FS3 3
-#define ID0FS4 4
-#define ID0E 7
-
-#define LFID1M _SFR_MEM8(0x91)
-#define ID1FS0 0
-#define ID1FS1 1
-#define ID1FS2 2
-#define ID1FS3 3
-#define ID1FS4 4
-#define ID1E 7
-
-#define LFRDF _SFR_MEM8(0x92)
-#define RDFS0 0
-#define RDFS1 1
-#define RDFS2 2
-#define RDFS3 3
-#define RDFS4 4
-#define RDFE 7
-
-#define LFRSD1 _SFR_MEM8(0x93)
-
-#define LFRSD2 _SFR_MEM8(0x94)
-
-#define LFRSD3 _SFR_MEM8(0x95)
-
-#define LFCC1 _SFR_MEM8(0x96)
-
-#define LFCC2 _SFR_MEM8(0x97)
-
-#define LFCC3 _SFR_MEM8(0x98)
-
-/* Reserved [0x99..0x9B] */
-
-#define TPIMR _SFR_MEM8(0x9C)
-#define TPIM 0
-
-/* Reserved [0x9D] */
-
-#define RTCCR _SFR_MEM8(0x9E)
-#define RTCR 0
-
-#define RTCDR _SFR_MEM8(0x9F)
-
-/* Reserved [0xA0..0xA7] */
-
-#define TMMDR _SFR_MEM8(0xA8)
-
-#define TMBDR _SFR_MEM8(0xA9)
-
-#define TMTDR _SFR_MEM8(0xAA)
-
-#define TMSR _SFR_MEM8(0xAB)
-
-/* Reserved [0xAC] */
-
-#define CRCDR _SFR_MEM8(0xAD)
-
-#define CRCCR _SFR_MEM8(0xAE)
-#define CRCN0 0
-#define CRCN1 1
-#define CRCN2 2
-#define CRCSEL 3
-#define REFLI 4
-#define REFLO 5
-#define CRCRS 7
-
-#define CRCSR _SFR_MEM8(0xAF)
-#define CRCBF 0
-
-
-
-/* Interrupt vectors */
-/* Vector 0 is the reset vector */
-/* Transponder Mode Interrupt */
-#define TPINT_vect _VECTOR(1)
-#define TPINT_vect_num 1
-
-/* External Interrupt Request 0 */
-#define INT0_vect _VECTOR(2)
-#define INT0_vect_num 2
-
-/* Pin Change Interrupt Request 0 */
-#define PCINT0_vect _VECTOR(3)
-#define PCINT0_vect_num 3
-
-/* Pin Change Interrupt Request 1 */
-#define PCINT1_vect _VECTOR(4)
-#define PCINT1_vect_num 4
-
-/* Voltage Monitoring Interrupt */
-#define VMINT_vect _VECTOR(5)
-#define VMINT_vect_num 5
-
-/* Timer0 Interval Interrupt */
-#define T0INT_vect _VECTOR(6)
-#define T0INT_vect_num 6
-
-/* LF-Receiver Identifier 0 Interrupt */
-#define LFID0INT_vect _VECTOR(7)
-#define LFID0INT_vect_num 7
-
-/* LF-Receiver Identifier 1 Interrupt */
-#define LFID1INT_vect _VECTOR(8)
-#define LFID1INT_vect_num 8
-
-/* LF-Receiver Frame End Interrupt */
-#define LFFEINT_vect _VECTOR(9)
-#define LFFEINT_vect_num 9
-
-/* LF-Receiver Data Buffer full Interrupt */
-#define LFDBINT_vect _VECTOR(10)
-#define LFDBINT_vect_num 10
-
-/* Timer/Counter3 Capture Event Interrupt */
-#define T3CAPINT_vect _VECTOR(11)
-#define T3CAPINT_vect_num 11
-
-/* Timer/Counter3 Compare Match Interrupt */
-#define T3COMINT_vect _VECTOR(12)
-#define T3COMINT_vect_num 12
-
-/* Timer/Counter3 Overflow Interrupt */
-#define T3OVFINT_vect _VECTOR(13)
-#define T3OVFINT_vect_num 13
-
-/* Timer/Counter2 Compare Match Interrupt */
-#define T2COMINT_vect _VECTOR(14)
-#define T2COMINT_vect_num 14
-
-/* Timer/Counter2 Overflow Interrupt */
-#define T2OVFINT_vect _VECTOR(15)
-#define T2OVFINT_vect_num 15
-
-/* Timer 1 Interval Interrupt */
-#define T1INT_vect _VECTOR(16)
-#define T1INT_vect_num 16
-
-/* SPI Serial Transfer Complete Interrupt */
-#define SPISTC_vect _VECTOR(17)
-#define SPISTC_vect_num 17
-
-/* Timer Modulator SSI Receive Buffer Interrupt */
-#define TMRXBINT_vect _VECTOR(18)
-#define TMRXBINT_vect_num 18
-
-/* Timer Modulator SSI Transmit Buffer Interrupt */
-#define TMTXBINT_vect _VECTOR(19)
-#define TMTXBINT_vect_num 19
-
-/* Timer Modulator Transmit Complete Interrupt */
-#define TMTXCINT_vect _VECTOR(20)
-#define TMTXCINT_vect_num 20
-
-/* AES Interrupt */
-#define AESINT_vect _VECTOR(21)
-#define AESINT_vect_num 21
-
-/* LF-Receiver RSSi measurement Interrupt */
-#define LFRSSINT_vect _VECTOR(22)
-#define LFRSSINT_vect_num 22
-
-/* LF-Receiver Signal Detect Interrupt */
-#define LFSDINT_vect _VECTOR(23)
-#define LFSDINT_vect_num 23
-
-/* LF-Receiver Manchester Decoder error Interrupt */
-#define LFMDINT_vect _VECTOR(24)
-#define LFMDINT_vect_num 24
-
-/* External Input Clock Monitoring Interrupt */
-#define EXCMINT_vect _VECTOR(25)
-#define EXCMINT_vect_num 25
-
-/* External XTAL Oscillator Break Down Interrupt */
-#define EXXMINT_vect _VECTOR(26)
-#define EXXMINT_vect_num 26
-
-/* Real Time Clock Interrupt */
-#define RTCINT_vect _VECTOR(27)
-#define RTCINT_vect_num 27
-
-/* EEPROM Ready Interrupt */
-#define EEREADY_vect _VECTOR(28)
-#define EEREADY_vect_num 28
-
-/* Store Program Memory Ready */
-#define SPMREADY_vect _VECTOR(29)
-#define SPMREADY_vect_num 29
-
-#define _VECTORS_SIZE 120
-
-
-/* Constants */
-
-#define SPM_PAGESIZE 128
-#define FLASHSTART 0x0000
-#define FLASHEND 0x3FFF
-#define RAMSTART 0x0100
-#define RAMSIZE 512
-#define RAMEND 0x02FF
-#define E2START 0
-#define E2SIZE 2048
-#define E2PAGESIZE 16
-#define E2END 0x07FF
-#define XRAMEND RAMEND
-
-
-/* Fuses */
-
-#define FUSE_MEMORY_SIZE 1
-
-/* Fuse Byte */
-#define FUSE_CKDIV8 (unsigned char)~_BV(128)
-#define FUSE_DWEN (unsigned char)~_BV(64)
-#define FUSE_SPIEN (unsigned char)~_BV(32)
-#define FUSE_WDTON (unsigned char)~_BV(16)
-#define FUSE_EESAVE (unsigned char)~_BV(8)
-#define FUSE_Reserved (unsigned char)~_BV(4)
-#define FUSE__32OEN (unsigned char)~_BV(2)
-#define FUSE_EXTCLKEN (unsigned char)~_BV(1)
-
-/* Lock Bits */
-#define __LOCK_BITS_EXIST
-#define __BOOT_LOCK_BITS_0_EXIST
-#define __BOOT_LOCK_BITS_1_EXIST
-
-
-/* Signature */
-#define SIGNATURE_0 0x1E
-#define SIGNATURE_1 0x94
-#define SIGNATURE_2 0x61
-
-
-#endif /* #ifdef _AVR_ATA5790_H_INCLUDED */
-
+/*****************************************************************************
+ *
+ * Copyright (C) 2014 Atmel Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in
+ * the documentation and/or other materials provided with the
+ * distribution.
+ *
+ * * Neither the name of the copyright holders nor the names of
+ * contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ ****************************************************************************/
+
+
+#ifndef _AVR_ATA5790_H_INCLUDED
+#define _AVR_ATA5790_H_INCLUDED
+
+
+#ifndef _AVR_IO_H_
+# error "Include <avr/io.h> instead of this file."
+#endif
+
+#ifndef _AVR_IOXXX_H_
+# define _AVR_IOXXX_H_ "ioa5790.h"
+#else
+# error "Attempt to include more than one <avr/ioXXX.h> file."
+#endif
+
+/* Registers and associated bit numbers */
+
+#define PINB _SFR_IO8(0x03)
+#define PINB7 7
+#define PINB6 6
+#define PINB5 5
+#define PINB4 4
+#define PINB3 3
+#define PINB2 2
+#define PINB1 1
+#define PINB0 0
+
+#define DDRB _SFR_IO8(0x04)
+#define DDRB7 7
+#define DDRB6 6
+#define DDRB5 5
+#define DDRB4 4
+#define DDRB3 3
+#define DDRB2 2
+#define DDRB1 1
+#define DDRB0 0
+
+#define PORTB _SFR_IO8(0x05)
+#define PORTB7 7
+#define PORTB6 6
+#define PORTB5 5
+#define PORTB4 4
+#define PORTB3 3
+#define PORTB2 2
+#define PORTB1 1
+#define PORTB0 0
+
+#define PINC _SFR_IO8(0x06)
+#define PINC7 7
+#define PINC6 6
+#define PINC5 5
+#define PINC4 4
+#define PINC3 3
+#define PINC2 2
+#define PINC1 1
+#define PINC0 0
+
+#define DDRC _SFR_IO8(0x07)
+#define DDRC7 7
+#define DDRC6 6
+#define DDRC5 5
+#define DDRC4 4
+#define DDRC3 3
+#define DDRC2 2
+#define DDRC1 1
+#define DDRC0 0
+
+#define PORTC _SFR_IO8(0x08)
+#define PORTC7 7
+#define PORTC6 6
+#define PORTC5 5
+#define PORTC4 4
+#define PORTC3 3
+#define PORTC2 2
+#define PORTC1 1
+#define PORTC0 0
+
+#define PIND _SFR_IO8(0x09)
+#define PIND7 7
+#define PIND6 6
+#define PIND5 5
+#define PIND4 4
+#define PIND3 3
+#define PIND2 2
+#define PIND1 1
+#define PIND0 0
+
+#define DDRD _SFR_IO8(0x0A)
+#define DDRD7 7
+#define DDRD6 6
+#define DDRD5 5
+#define DDRD4 4
+#define DDRD3 3
+#define DDRD2 2
+#define DDRD1 1
+#define DDRD0 0
+
+#define PORTD _SFR_IO8(0x0B)
+#define PORTD7 7
+#define PORTD6 6
+#define PORTD5 5
+#define PORTD4 4
+#define PORTD3 3
+#define PORTD2 2
+#define PORTD1 1
+#define PORTD0 0
+
+/* Reserved [0x0C] */
+
+#define TPCR _SFR_IO8(0x0D)
+#define TPMA 0
+#define TPMOD 1
+#define TPMS0 2
+#define TPMS1 3
+#define TPMD0 4
+#define TPMD1 5
+#define TPPSD 6
+#define TPD 7
+
+#define TPFR _SFR_IO8(0x0E)
+#define TPF 0
+#define TPA 1
+#define TPGAP 2
+#define TPPSW 3
+
+#define CMCR _SFR_IO8(0x0F)
+#define CMM0 0
+#define CMM1 1
+#define SRCD 2
+#define CO32D 3
+#define CCS 4
+#define ECINS 5
+#define CMONEN 6
+#define CMCCE 7
+
+#define CMSR _SFR_IO8(0x10)
+#define ECF 0
+#define SXF 1
+#define RTCF 2
+
+#define T2CR _SFR_IO8(0x11)
+#define T2OTM 0
+#define T2CTM 1
+#define T2CRM 2
+#define T2GRM 3
+#define T2TOP 4
+#define T2RES 5
+#define T2TS 6
+#define T2E 7
+
+#define T3CR _SFR_IO8(0x12)
+#define T3OTM 0
+#define T3CTM 1
+#define T3CRM 2
+#define T3CPRM 3
+#define T3TOP 4
+#define T3RES 5
+#define T3CPTM 6
+#define T3E 7
+
+#define AESCR _SFR_IO8(0x13)
+#define AESWK 0
+#define AESWD 1
+#define AESIM 2
+#define AESD 3
+#define AESXOR 4
+#define AESRES 5
+#define AESE 7
+
+#define AESSR _SFR_IO8(0x14)
+#define AESRF 0
+#define AESERF 7
+
+#define TMIFR _SFR_IO8(0x15)
+#define TMRXF 0
+#define TMTXF 1
+#define TMTCF 2
@@ Diff output truncated at 153600 characters. @@
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