[avr-libc-dev] iocan128.h changes - possibly final

[Colin O'Flynn]

Hello,

[Note: I originally sent this message June 19th, but am now sending it out to 
the avr-libc-dev list as well, since I didn't hear back from Ted]

Well I finally got around to doing some final stuff I said I would do a while 
ago to the iocan128.h file (mostly some final checks). I've attached the 
final version I have (didn't think there was a point to a patch since there 
is a LOT of things moved around so the patch file was bigger than the 
original!!). 

Changes:

-Moved bits so they are located with the register definitions 

-TWI Address Register bits named wrong, forget the 'r' in them

-Corrected description of CANSTM register comments (I forgot since I was tired 
at that point since it was the last register almost I just guessed what the 
bit names were, and for the register define I forgot to change it at all)

-Removed generics for Timer/Counter Registers as they are no longer safe 
because there is two different layouts of "Timer/Counter Control Register A" 
bits because Atmel named what is basically "Timer/Counter0 Control Register" 
as "Timer/Counter0 Control Register A" (there is only the one register for 
Timer/Counter0).

-Added some thanks for people who have contributed to file (sorry I couldn't 
find everyone, I thought there was more than the two I have. If I have missed 
you PLEASE tell me)

-Changed the name of the two new interrupts added from the temporary name I 
had to the interrupt name on the datasheet

I am quite confident in this file now, as I checked over every register and 
every bit that it is in the correct place and named according to the 
datasheet.

One question though - the line:
#define    FLASHEND 0x1FFFF
Is that correct? I took it from the iom128.h file as the can128 has the same 
flash. Shouldn't it just be 
#define    FLASHEND 0xFFFF
Instead? Since the flash is arranged in words that would be 128Kbyte...

Regards,

 -Colin

iocan128.h.gz
Description: GNU Zip compressed data