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AW: AW: [avr-libc-dev] Additional instruction patterns for or more effic
From: |
Björn Haase |
Subject: |
AW: AW: [avr-libc-dev] Additional instruction patterns for or more efficient code using mixed QI/HI/SI expressions |
Date: |
Sat, 11 Dec 2004 15:02:11 +0100 |
Hy Denis,
Thank's for reviewing the code fragments
>Some your new patterns are right some are wrong. I suggest to produce
>the work step by step with small changes.
Consider my suggestions to be the sketch of a basic idea. My suggestion
is to concentrate on the change in the two "define_expand"s and the
move patterns first. Possibly one might add the compare patterns as well.
>PS: Righ now I think that better to rewrite many insns for
> HI,SI,DI modes as splitters to QI mode (naitive AVR) insns.
> If you want to help then better to concentrate on this.
I agree with you in that this would be a much better solution. The only
possible disadvantage is, in my opinion, that debugging of optimized code
would be
allmost impossible.
Before writing so many combined patterns, I have also thought about
using UNSPECs, eg. for defining adc, sbc, etc. and use splitting of the SI
instructions.
So far, I, however thought that there is no easy way for teaching the
compiler to
actually use them since this would require to get rid of all objects with
DI/SI and HI
mode after the RTL generation step. I thought, that this would make it
necessary
to add a completely new optimizer pass. For implementing this, one would
need a deeper knowledge of gcc interna than I have.
Yours,
Björn
[avr-libc-dev] AW: Register allocator / -fnew-ra issue, Björn Haase, 2004/12/07
RE: [avr-libc-dev] Improved optimizer for mixed 32 / 16 / 8 bitexpressions, Bernard Fouché, 2004/12/02