Hello List,
I'm new here and hope this isn't an old proposal.
Since I'm working with the at90can128 I found something missing
where the other avrs had no need for:
The CANIDT and CANIDM registers are used to store a can-id in a
rather strange format. But regardless of the weired numbering
(CANIDT1-4 are reversed to the 'normal' addresses' order, CANIDT4 is
0xF0 and CANIDT1 is 0xF3) and the bitshifting (CAN-A addresses are
shifted << 16+5 and -B are shiftet << 3) it is not denyable that
this is some kind of 32-bit datatype.
iocan128.h defines (like all other ioxxx.h) not only the pure
8bit register names but also in addition 16bit register names
(e.g. for Timer/Counter 1 the registers TCNT1H and TCNT1L and TCNT1
for 16 bit access).
I feel it would be a good idea to keep this system for the 2 new
32bit registers CANIDT and CANIDM.
So I propose the extension of iocan128.h for:
#define CANIDT _SFR_MEM32(0xF0)
#define CANIDM _SFR_MEM32(0xF4)
and
#define CANIDTLW _SFR_MEM16(0xF0)
#define CANIDTHW _SFR_MEM16(0xF2)
#define CANIDMLW _SFR_MEM16(0xF4)
#define CANIDMHW _SFR_MEM16(0xF6)
(the -LW/-HW definitions seem strange for the first sight. But if
you're
using CAN type A Addresses you frequently have the need for only
accessing the 16 high bits of the register instead of accessing the
whole register and shift it 16+5 bits. -LW means 'LowWord', -LH
'HighWord' of course)
In order for this to work there is an extension to sfr_defs.h:
#define _MMIO_LONG(mem_addr) (*(volatile uint32_t *)(mem_addr))
#define _SFR_MEM32(mem_addr) _MMIO_LONG(mem_addr)
#define _SFR_IO32(io_addr) _MMIO_LONG((io_addr) + 0x20)
#define _SFR_LONG(sfr) _MMIO_LONG(_SFR_ADDR(sfr))
Which defines the c-types.
I have all these definitions in my defs.h and they prevent me
from writing:
BYTEAT( mob->address, 0 ) = CANIDT4;
BYTEAT( mob->address, 1 ) = CANIDT3;
BYTEAT( mob->address, 2 ) = CANIDT2;
BYTEAT( mob->address, 3 ) = CANIDT1;
where instead I'm able to use:
mob->address = CANIDT;
I hope some others will find this usefull, too.