Re: [avr-libc-dev] Possibly incorrect wdt implementation for xmega

[Omar Choudary]

I've found that the iox256a3.h file actually contains the more correct values:
/* Period setting */
typedef enum WDT_PER_enum
{
    WDT_PER_8CLK_gc = (0x00<<2),  /* 8 cycles (8ms @ 3.3V) */
    WDT_PER_16CLK_gc = (0x01<<2),  /* 16 cycles (16ms @ 3.3V) */
    WDT_PER_32CLK_gc = (0x02<<2),  /* 32 cycles (32ms @ 3.3V) */
    WDT_PER_64CLK_gc = (0x03<<2),  /* 64 cycles (64ms @ 3.3V) */
    WDT_PER_128CLK_gc = (0x04<<2),  /* 128 cycles (0.125s @ 3.3V) */
    WDT_PER_256CLK_gc = (0x05<<2),  /* 256 cycles (0.25s @ 3.3V) */
    WDT_PER_512CLK_gc = (0x06<<2),  /* 512 cycles (0.5s @ 3.3V) */
    WDT_PER_1KCLK_gc = (0x07<<2),  /* 1K cycles (1s @ 3.3V) */
    WDT_PER_2KCLK_gc = (0x08<<2),  /* 2K cycles (2s @ 3.3V) */
    WDT_PER_4KCLK_gc = (0x09<<2),  /* 4K cycles (4s @ 3.3V) */
    WDT_PER_8KCLK_gc = (0x0A<<2),  /* 8K cycles (8s @ 3.3V) */
} WDT_PER_t;

However, as you mention, I doubt the code in the avr-libc is using
that properly. At least not from what I've seen.

On Fri, Apr 6, 2012 at 4:46 PM, Erik Walthinsen <address@hidden> wrote:
> On 04/06/2012 06:03 AM, Omar Choudary wrote:
>>
>> That is strange, since the XMEGA supports 11 different timeouts, from 8ms
>> to 8s.
>>
>> Even worst perhaps, the values are incorrect and most probably the
>> registers used as well.
>> That is, for the xmega (from the datasheet) the encodings are
>> different than for the previous AVRs.
>> For example 2S is encoded as "1000" (i.e. 8) while for an AT90USB1287
>> the value is "0111" (i.e. 7).
>
>
> I can confirm that the xmega WDT stuff is very broken, I've resorted to not
> only figuring the register values myself but ditching the entire
> wdt_enable/disable code and just doing it myself with the CCP register and
> all.  I'd fix it if I had time, but.... ;-(
>
> _______________________________________________
> AVR-libc-dev mailing list
> address@hidden
> https://lists.nongnu.org/mailman/listinfo/avr-libc-dev