[Bug gas/20145] Improve x86 .noXXX directives

[cvs-commit at gcc dot gnu.org]

https://sourceware.org/bugzilla/show_bug.cgi?id=20145

--- Comment #1 from cvs-commit at gcc dot gnu.org <cvs-commit at gcc dot 
gnu.org> ---
The master branch has been updated by H.J. Lu <address@hidden>:

https://sourceware.org/git/gitweb.cgi?p=binutils-gdb.git;h=1848e567343e9c50979453463f34e0a55ba892eb

commit 1848e567343e9c50979453463f34e0a55ba892eb
Author: H.J. Lu <address@hidden>
Date:   Fri May 27 10:05:39 2016 -0700

    Update x86 CPU_XXX_FLAGS handling

    Support defining CPU_XXX_FLAGS with other CPU_XXX_FLAGS.  Update
    CPU_XXX_FLAGS to enable more bits like x87 and SYSCALL.  Don't enable
    MMX when enabling SSE, AVX or AVX512.  Don't disable AVX nor AVX512 when
    disabling SSE.  Don't disable AVX512 when disabling AVX.  Disable F16C,
    FMA, FMA4 and XOP when disabling AVX.  Add 87, no287, no387, no687,
    nosse2, nosse3, nossse3, nosse4.1, nosse4.2, nosse4 and noavx2 directives
    to x86 assembler.

    TODO: Add more .noXXX, like .noavx512f, directives to x86 assembler.

    gas/

        PR gas/20145
        * config/tc-i386.c (cpu_arch): Add 687.
        (cpu_noarch): Add no287, no387, no687, nosse2, nosse3, nossse3,
        nosse4.1, nosse4.2, nosse4 and noavx2.
        (parse_real_register): Check cpuregmmx instead of cpummx for MMX
        register.  Check cpuregxmm instead of cpusse for XMM register.
        Check cpuregymm instead of cpuavx for YMM register.  Check
        cpuregzmm/cpuregmask instead of cpuavx512f for ZMMM/mask register.
        * doc/c-i386.texi: Mention 687, no287, no387, no687, nosse2,
        nosse3, nossse3, nosse4.1, nosse4.2, nosse4 and noavx2.
        * testsuite/gas/i386/arch-10-prefetchw.d (as): Add mmx.
        * testsuite/gas/i386/arch-10.d (as): Likewise.
        * testsuite/gas/i386/arch-11.s: Add ".arch .mmx".
        * testsuite/gas/i386/i386.exp: Pass mmx to assembler for
        arch-10-3 and arch-10-4.  Run no87-3, nosse-4, nosse-5, noavx-3
        and noavx-4.
        * testsuite/gas/i386/no87-3.l: New file.
        * testsuite/gas/i386/no87-3.s: Likewise.
        * testsuite/gas/i386/noavx-3.l: Likewise.
        * testsuite/gas/i386/noavx-3.s: Likewise.
        * testsuite/gas/i386/noavx-4.d: Likewise.
        * testsuite/gas/i386/noavx-4.s: Likewise.
        * testsuite/gas/i386/nosse-4.l: Likewise.
        * testsuite/gas/i386/nosse-4.s: Likewise.
        * testsuite/gas/i386/nosse-5.d: Likewise.
        * testsuite/gas/i386/nosse-5.s: Likewise.

    opcodes/

        PR gas/20145
        * i386-gen.c (cpu_flag_init): Update CPU_XXX_FLAGS.  Remove
        CpuMMX from CPU_SSE_FLAGS.  Remove AVX and AVX512 bits from
        CPU_ANY_SSE_FLAGS.  Remove AVX512 bits from CPU_ANY_AVX_FLAGS.
        Add CPU_XSAVE_FLAGS to CPU_XSAVEOPT_FLAGS, CPU_XSAVE_FLAGS and
        CpuXSAVEC.  Add CPU_AVX_FLAGS to CpuF16C.  Remove CpuMMX from
        CPU_AVX512F_FLAGS, CPU_AVX512CD_FLAGS, CPU_AVX512ER_FLAGS,
        CPU_AVX512PF_FLAGS, CPU_AVX512DQ_FLAGS and CPU_AVX512BW_FLAGS.
        Add CPU_SSE2_FLAGS to CPU_SHA_FLAGS.   Add CPU_ANY_287_FLAGS,
        CPU_ANY_387_FLAGS, CPU_ANY_687_FLAGS, CPU_ANY_SSE2_FLAGS,
        CPU_ANY_SSE3_FLAGS, CPU_ANY_SSSE3_FLAGS, CPU_ANY_SSE4_1_FLAGS,
        CPU_ANY_SSE4_2_FLAGS and CPU_ANY_AVX2_FLAGS.  Enable CpuRegMMX
        for MMX.  Enable CpuRegXMM for SSE, AVX and AVX512.  Enable
        CpuRegYMM for AVX and AVX512VL,  Enable CpuRegZMM and
        CpuRegMask for AVX512.
        (cpu_flags): Add CpuRegMMX, CpuRegXMM, CpuRegYMM, CpuRegZMM
        and CpuRegMask.
        (set_bitfield_from_cpu_flag_init): New function.
        (set_bitfield): Remove const on f.  Call
        set_bitfield_from_cpu_flag_init to handle CPU_XXX_FLAGS.
        * i386-opc.h (CpuRegMMX): New.
        (CpuRegXMM): Likewise.
        (CpuRegYMM): Likewise.
        (CpuRegZMM): Likewise.
        (CpuRegMask): Likewise.
        (i386_cpu_flags): Add cpuregmmx, cpuregxmm, cpuregymm, cpuregzmm
        and cpuregmask.
        * i386-init.h: Regenerated.
        * i386-tbl.h: Likewise.

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