[Bug gas/22559] AArch64 disassembles lane indexed dot product instructions incorrectly

[cvs-commit at gcc dot gnu.org]

https://sourceware.org/bugzilla/show_bug.cgi?id=22559

--- Comment #1 from cvs-commit at gcc dot gnu.org <cvs-commit at gcc dot 
gnu.org> ---
The master branch has been updated by Tamar Christina
<address@hidden>:

https://sourceware.org/git/gitweb.cgi?p=binutils-gdb.git;h=00c2093f698e8f40c04340cb1832d09e11ece237

commit 00c2093f698e8f40c04340cb1832d09e11ece237
Author: Tamar Christina <address@hidden>
Date:   Tue Dec 19 12:05:20 2017 +0000

    Correct disassembly of dot product instructions.

    Dot products deviate from the normal disassembly rules for lane indexed
    instruction. Their canonical representation is in the form of:

    v0.2s, v0.8b, v0.4b[0] instead of v0.2s, v0.8b, v0.b[0] to try to denote
    that these instructions select 4x 1 byte elements instead of a single 1
byte
    element.

    Previously we were disassembling them following the normal rules, this
patch
    corrects the disassembly.

    gas/

        PR gas/22559
        * config/tc-aarch64.c (vectype_to_qualifier): Support
AARCH64_OPND_QLF_S_4B.
        * gas/testsuite/gas/aarch64/dotproduct.d: Update disassembly.

    include/

        PR gas/22559
        * aarch64.h (aarch64_opnd_qualifier): Add AARCH64_OPND_QLF_S_4B.

    opcodes/

        PR gas/22559
        * aarch64-asm.c (aarch64_ins_reglane): Change AARCH64_OPND_QLF_S_B to
        AARCH64_OPND_QLF_S_4B
        * aarch64-dis.c (aarch64_ext_reglane): Change AARCH64_OPND_QLF_S_B to
        AARCH64_OPND_QLF_S_4B
        * aarch64-opc.c (aarch64_opnd_qualifiers): Add 4b variant.
        * aarch64-tbl.h (QL_V2DOT): Change S_B to S_4B.

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