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[Bug binutils/23033] New: gdb disassemble: ARM Thumb2 0x4503 is bad, no
From: |
jreiser at BitWagon dot com |
Subject: |
[Bug binutils/23033] New: gdb disassemble: ARM Thumb2 0x4503 is bad, not "cmp r3,r0" |
Date: |
Fri, 06 Apr 2018 15:16:02 +0000 |
https://sourceware.org/bugzilla/show_bug.cgi?id=23033
Bug ID: 23033
Summary: gdb disassemble: ARM Thumb2 0x4503 is bad, not "cmp
r3,r0"
Product: binutils
Version: 2.31 (HEAD)
Status: UNCONFIRMED
Severity: normal
Priority: P2
Component: binutils
Assignee: unassigned at sourceware dot org
Reporter: jreiser at BitWagon dot com
Target Milestone: ---
The ARM Thumb2 instruction word 0x4503 is disassembled as
cmp r3,r0
by GNU gdb (GDB) 8.1.50.20180405-git built from source:
commit 043e9508be0a4ea7ab56fd5716e4c06d609d13be (HEAD -> master,
origin/master, origin/HEAD)
Author: Nick Clifton <address@hidden>
Date: Thu Apr 5 14:44:05 2018 +0100
However the hardware documentation
ARM Architecture Reference Manual
ARMv8, for ARMv8-A architecture profile
ARM DDI 0487A.f (ID032515)
Copyright 2013-2015 ARM Limited
section F7.1.37 "CMP (register)" on page F7-2716 (.pdf page 2714)
says that 0x4503 is UNPREDICTABLE because both bit 7 and bit 6
(the 0xc0 bits) are 0, while the instruction 0x45XX as CMP
requires at least one "hi register" numbered >= 8.
The Thumb1 instruction 0x4280|(Rm<<3)|Rn is CMP for two
"lo registers" each numbered < 8.
===== test case "4503.S"
.thumb_func
_start: .globl _start
.short 0x4503
cmp r3,r0
cmp r11,r0
=====
$ gcc -c 4503.S
$ build-gdb/gdb/gdb --data-directory=build-gdb/gdb/data-directory 4503.o
GNU gdb (GDB) 8.1.50.20180405-git
(gdb) x/3i 1
0x1 <_start>: cmp r3, r0 <===== should be "bad"
0x3 <_start+2>: cmp r3, r0
0x5 <_start+4>: cmp r11, r0
(gdb) x/3xh 0
0x0 <_start>: 0x4503 0x4283 0x4583
(gdb) q
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