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From: | wilson at gcc dot gnu.org |
Subject: | [Bug gas/27436] RISC-V inconsistent handling of rv32 shift with count > 32 |
Date: | Thu, 18 Feb 2021 20:31:55 +0000 |
https://sourceware.org/bugzilla/show_bug.cgi?id=27436 Jim Wilson <wilson at gcc dot gnu.org> changed: What |Removed |Added ---------------------------------------------------------------------------- Target| |riscv*-*-* -- You are receiving this mail because: You are on the CC list for the bug.
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