[Bug gas/32500] New: [GAS] Imprecise assembly syntax check in RISC-V

[witbring at gmail dot com]

https://sourceware.org/bugzilla/show_bug.cgi?id=32500

            Bug ID: 32500
           Summary: [GAS] Imprecise assembly syntax check in RISC-V
           Product: binutils
           Version: 2.41
            Status: UNCONFIRMED
          Severity: normal
          Priority: P2
         Component: gas
          Assignee: unassigned at sourceware dot org
          Reporter: witbring at gmail dot com
  Target Milestone: ---

I observed an issue in GAS involving inaccurate syntax checking and incorrect
encoding in RISC-V.

First, in the RISC-V environment, I noticed that syntactically incorrect
assembly code was still successfully compiled. In the example below,
parentheses in the operand, which are intended to indicate memory references,
were misinterpreted in the compiled output as if the operand had no
parentheses.

Additionally, in the example, `j (1)` and `jal (2)` instructions can branch to
addresses that are not 4-byte aligned. I think GAS should issue a warning or an
error during the compilation process in these scenarios.

```
$ cat buggy.s
    j (1)
    jal (2)
    jalr (a3)
    jr (a4)

$ ./bin/riscv-linux-gnu-as buggy.s -o buggy.o


$ ./bin/objdump -d buggy.o

buggy.o:     file format elf64-littleriscv

Disassembly of section .text:

0000000000000000 <.text>:
   0:   0000006f                j       0 <.text>
   4:   000000ef                jal     4 <.text+0x4>
   8:   000680e7                jalr    a3
   c:   00070067                jr      a4
Disassembly of section .text:

```

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