feclearexcept() error on i386 CPUs with SSE

[Steve Chaplin]

The problem:
#include <fenv.h>
void feclearexcept(int ex)

This function should clear the specified exception status bits in the
FPU status register. For CPUs with SSE support it should also clear the
MXCSR status register bits.

The problem is that feclearexcept() clears the status control bits also,
causing future floating-point errors to generate interrupts which will
lead to a SIGFPE signal which terminates the program (unless caught by a
SIGFPE handler).

The program that follows illustrates the problem
When compiled on a SSE processor, such as an athlon-xp, with
'gcc -march=athlon-xp file.c'
It shows that:
The status bits change  - they are cleared - which is correct
The control bits change - this is the bug

Test program:
/* start or file */
#include <stdio.h>
#include <fenv.h>

int
main (void)
{
  int exc_control, exc_status;

  __asm__ ("stmxcsr %0" : "=m" (*&exc_control)); 
  exc_control = ~(exc_control >> 7) & FE_ALL_EXCEPT;
  // we cannot use:
  // exc_control = fegetexcept ();
  // since it does not return the SSE flags (that's another bug)

  /* raise all exceptions - set their status bit to on */
  feraiseexcept(FE_ALL_EXCEPT);
  exc_status = fetestexcept(FE_ALL_EXCEPT);

  printf ("Before\n");
  printf ("Exception control : %X\n", exc_control);
  printf ("Exception status  : %X\n", exc_status);

  feclearexcept (FE_ALL_EXCEPT);

  __asm__ ("stmxcsr %0" : "=m" (*&exc_control)); 
  exc_control = ~(exc_control >> 7) & FE_ALL_EXCEPT;
  exc_status  = fetestexcept(FE_ALL_EXCEPT);
  printf ("After\n");
  printf ("Exception control : %X\n", exc_control); // the bug - this
should not change
  printf ("Exception status  : %X\n", exc_status);  // this is supposed
to change to 0
}
/* end of file */


Solution:
one-liner patch for libc/sysdeps/i386/fpu/fclrexcpt.c attached

-- 
Steve Chaplin

fclrexcpt.c.patch
Description: Text Data