Doubts About the Polyphase Clock Sync Block

[Saurav Roy]

Dear all,

I have a few questions about the Polyphase Clock Sync Block in reference to https://github.com/gnuradio/gnuradio/blob/master/gr-digital/lib/pfb_clock_sync_ccf_impl.cc

1. line no 67:    d_damping = 2 * d_nfilters;   -->  d_nfilters=32, should this not be around 0.707
   
   
   
2. line no 366:  based on the 'time_est' tag, determine the filter index, d_k. But, this completely bypasses the TED and the control loop as in line no 374 d_filtnum = (int)floor(d_k);
   then why do we need this Polyphase Clock Sync Block at all?
   
   

3. How does the main loop take care of which input samples are selected for the determination of d_error and d_k such that all the input samples come from the same input symbol?

With thanks and regards 

Saurav