Re: gmake include makefile question

[Murali]

basic Info: OS=Linux (FC4), gmake ver=3.79 or 3.80 (dont remember
which)

The story so far:

--------------
MAKEFLAGS = -r

Makefile.Depend:
<tab>gendepend.sh

-include Makefile.Depend
include Makefile.other

file1.o: file1.F90
<tab>f90 -c file1.F90

file2.o: file2.F90
<tab>f90 -c file1.F90

all: file1.o file2.o
------------

The gendepend.sh script generates all required dependencies and puts
them in Makefile.Depend. I need to run make twice to get things
working. The first time, the Makefile.Depend in created and the second
time the targets are made. Removing "MAKEFLAGS -r" line did not help.
If I run the gendepend.sh script by hand first then one call to make is
enough.

Since the first post I realised that I also had declared
"Makefile.Depend" as a PHONY target, expecting that this would only
cause the Makefile.Depend to be created everytime (which in itself
should not cause an error). However, removing the .PHONY directive
seems to fix the problem. Now I have several questions/suggestions

(1) Now I understand that the PHONY directive should have caused make
to go into an infinite loop and that gmake somehow recognized and
prevented this scenario. Still I do not understand how removing the
PHONY directive fixed the problem

(2) "gmake -d" did not display any information which told me it was
trying to call itself recursively. Adding this info to the debug
display would help others and me (in the future) realize something like
this is a problem.

- Murali