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Re: Make with another make as a prerequisite
From: |
crjjrc |
Subject: |
Re: Make with another make as a prerequisite |
Date: |
2 Mar 2007 06:58:00 -0800 |
User-agent: |
G2/1.0 |
On Mar 1, 10:45 am, crj...@gmail.com wrote:
> Hi. Say I've got a library of code that I actively maintain in ~/
> libdir and some code that depends on the library in ~/codedir. If I
> make a change in ~/libdir but do not run make there, I'd like to be
> able to check that when building things in ~/codedir, and make the
> library in ~/libdir and the targets in ~/codedir that depend on the
> library.
I think I've found a simple enough solution to this problem. First I
run a shell command that makes the library, and then I create a target
with no commands for the library. (This turns off any implicit rules
for the library, and is described in section 5.9 "Empty Commands" in
the GNU make manual. I don't want the codedir makefile to worry about
anything involved in making the library.) Targets in codedir's
makefile list the library target in their prerequisites. codedir/
makefile looks something like:
dummy = $(shell make -C ../libdir)
mycode: mylib.a mycode.o
mylib.a: ;
The assignment to dummy updates mylib.a if it is needed. And this
will in turn cause mycode to be updated. If the assignment to dummy
doesn't update anything, then mycode will depend solely on the
remaining prerequisites.
Thanks for listening!
- Chris