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I can't get asm code to link using g++ but it works with gcc


From: Sean McManus
Subject: I can't get asm code to link using g++ but it works with gcc
Date: Thu, 25 Nov 2004 02:04:09 -0800

I'm trying to link a .o file created from .asm using g++, but I get an 
undefined reference error, but this doesn't occur when I switch to gcc (i.e. 
I need to do something to accomidate the c++). It seems that the .o created 
from g++ can't link to the function I need in the .o file created by 
arm-elf-as . It seems I need to either alter the command lines or .asm code, 
but I don't know.

This is what I'm using to compile and link...the error happens during the 
last step.

arm-elf-g++  %CFILES% %CFLAGS%
arm-elf-as -o irq_handler.o irq_handler.asm -mthumb-interwork
arm-elf-g++ -o %GAME%.elf  %OFILES% %LDFLAGS%

And this is my assembly code...

  .SECTION .iwram,"ax",%progbits
  .EXTERN  IntrTable
  .GLOBAL  IrqHandler
  .ALIGN
  .ARM

IrqHandler:                        @ Multiple interrupts support
  mov     r2, #0x4000000           @ REG_BASE
  ldr     r3, [r2,#0x200]!         @ r2 = IE : r3 = IF|IE
  ldrh    r1, [r2, #0x8]           @ r1 = IME
  mrs     r0, spsr
  stmfd   sp!, {r0-r2,lr}          @ {spsr, IME, REG_IE, lr}  // IF|IE
  mov     r0, #1                   @ IME = 1 (To permit multiple ir if an ir 
occurs)
  strh    r0, [r2, #0x8]
  and     r1, r3, r3, lsr #16      @ r1 = IE & IF
  ldr     r12, =IntrTable
  ands    r0, r1, #1               @ V-blank interrupt
  bne     jump_intr
  add     r12,r12, #4
  ands    r0, r1, #2               @ H-blank interrupt
  bne     jump_intr
  add     r12,r12, #4
  ands    r0, r1, #4               @ V-counter interrupt
  bne     jump_intr
  add     r12,r12, #4
  ands    r0, r1, #8               @ Timer 0 interrupt
  bne     jump_intr
  add     r12,r12, #4
  ands    r0, r1, #0x10            @ Timer 1 interrupt
  bne     jump_intr
  add     r12,r12, #4
  ands    r0, r1, #0x20            @ Timer 2 interrupt
  bne     jump_intr
  add     r12,r12, #4
  ands    r0, r1, #0x40            @ Timer 3 interrupt
  bne     jump_intr
  add     r12,r12, #4
  ands    r0, r1, #0x80            @ Serial Communication Interrupt
  bne     jump_intr
  add     r12,r12, #4
  ands    r0, r1, #0x100           @ DMA 0 interrupt
  bne     jump_intr
  add     r12,r12, #4
  ands    r0, r1, #0x200           @ DMA 1 interrupt
  bne     jump_intr
  add     r12,r12, #4
  ands    r0, r1, #0x400           @ DMA 2 interrupt
  bne     jump_intr
  add     r12,r12, #4
  ands    r0, r1, #0x800           @ DMA 3 interrupt
  bne     jump_intr
  add     r12,r12, #4
  ands    r0, r1, #0x1000          @ Key interrupt
  bne     jump_intr
  add     r12,r12, #4
  ands    r0, r1, #0x2000          @ Cart interrupt

jump_intr:
  strh    r0, [r2, #2]             @ Clear IF
  mrs     r3, cpsr
  bic     r3, r3, #0xdf            @ \__
  orr     r3, r3, #0x1f            @ /  --> Enable IRQ & FIQ. Set CPU mode 
to System.
  msr     cpsr, r3
  ldr     r0, [r12]
  stmfd   sp!, {lr}
  adr     lr, IntrRet
  bx      r0

IntrRet:
  ldmfd   sp!, {lr}
  mrs     r3, cpsr
  bic     r3, r3, #0xdf            @ \__
  orr     r3, r3, #0x92            @ /  --> Disable IRQ. Enable FIQ. Set CPU 
mode to IRQ.
  msr     cpsr, r3
  ldmfd   sp!, {r0-r2,lr}          @ {spsr, IME, REG_IE, lr}  //IF|IE
  strh    r1,  [r2, #0x8]          @ restore REG_IME
  msr     spsr, r0                 @ restore spsr
  bx      lr

  .ALIGN
  .POOL




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