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Automatically Generating Linker Command Files
From: |
Ricky Venable |
Subject: |
Automatically Generating Linker Command Files |
Date: |
Tue, 20 Jul 2004 12:26:41 -0500 |
I'm converting a large makefile from OPUS make to GNU make, and the most
difficult thing to convert is the way I'm generating command files for the
linker.
In OPUS I can create the command file as I'm using it.
Its like this:
$(LD) -T<< $(CMDFILE)
text for command file
..
..
<< -o $@
Thats really easy, but I can't find a way to do it easily in GNU make. The
only solution I can think of is to have a separate rule to make the command
file which uses many echo statements to create the command file:
$(CMDFILE):
@echo -e \\ttext\\n >> $(CMDFILE)
@echo -e ...\\n >> $(CMDFILE)
...
Of course with echo statements, I have to use \\t to make tabs and \\n to
make newlines, which looks really ugly, whereas in OPUS, the makefile looked
identical to its result in the command file.
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