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| From: | David Boyce |
| Subject: | Re: make best practises: parentheses for variable names |
| Date: | Sat, 08 Jan 2005 11:36:46 -0500 |
At 09:58 AM 1/8/2005, Robert P. J. Day wrote:
i want to write a short coding standards doc for writing makefiles
for a few people who know even less about makefiles than i do, and one
of the things i'd like to enforce is the use of ${VARNAME} rather than
$(VARNAME) when referring to variables.
i just want to clarify that those two uses are exactly equivalent,
yes? i prefer the first form since it matches variable usage in the
unix shell, while the second resembles command substitution, and i'd
rather keep things vaguely consistent.
In my personal and undocumented "standard" I try to get some free self-documentation from the two forms. I use ${FOO} for values which typically come from the environment, e.g. ${HOME}, and $(FOO) for internal make macros such as $(CFLAGS). The mnemonic is that ${FOO} is legal shell syntax whereas $(FOO) works only in make. Of course make has its own rules and there's nothing to stop someone from setting CFLAGS in the environment but I still find it useful to document the expected source.
As for confusion with command substitution, I see your point but it's never been a problem in my experience.
-dsb
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