Re: help needed on include an -I

[Martin Mensch]

Hello Paul,

 

sorry that I was a bit unprecise, I thought it was not so long ago.

 

On 12. Apr 2005 Greg Kilfoyle wrote in this mail list:

 

I have implemented dependency generation based on the information from
this web page: http://make.paulandlesley.org/autodep.html

It works great, but my implementation has one serious drawback that I
don't see covered ... maybe I just missed something.

Let's say I have just done a complete build and everything is up-to-
date. I then manually remove a dependency file for a particular .c file
and update a header file that the .c file is dependent on. If I then
make, the .c file is not rebuilt.

I had a depclean target in our environment, which I removed because of
this problem. But I can't protect against someone 'accidently' removing

a dependency file.

 

.....

 

This was also my thought. If you call make and a dependency file doesn't exist but still the .c file is older than the .o file the other dependencies of that .c-file are not checked and this *might* cause trouble.

 

Then Greg Chicares posted also on 12. Apr :

 

Dependency files cache information that this technique needs;
it breaks if you remove them. Make won't recreate them when
that happens--they're created only as a side effect of the .o
rule. But you could guard against that by executing
  for z in *.o; { [ ! -e ${z%.o}.d ] && rm $z }
to remove any .o file whose .d file is gone.

 

That's were the line is from that I tried to put into my makefile.

But I couldn't get this running and also I couldn't find "for" in the make manual. But I found foreach and tried something with that.

Ok, I am not very familiar with make, I just want to improve my makefile a little, so my trial versions may look a little strange

 

 

Concerning the rule that I posted:

 

%.d: %.c

 @$(CC) -M -MP -MF $(OBJDIR)$(notdir $@) $(ALL_CFLAGS) $<

 

Paul D. Smith wrote:

This is invalid.  You are defining a rule to build "xxx.d" from "xxx.c",
but your rule doesn't build "xxx.d", instead it builds "$(OBJDIR)/xxx.d"
which is not the same thing at all.  Please see the "Rules of Makefiles"
on my site below.  When writing a (non-PHONY) rule it MUST create the
target make expects, and the target make expects is kept in "$@".  Your
rule must always create exactly "$@", not some different file that may
contain part of "$@".

 

I have defined a search path with vpath to make sure that the .d-file is found in $(OBJDIR).

But generaly spoken I don't see why there should be any restrictions of what the rule does. If it is neccessary for my purpose (what ever that may be) I can create files at any place. Isn't that right?

 

 

Thank you for your help on my problems.

 

Martin