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Re: how to methodically generate a set of rules?
From: |
Robert P. J. Day |
Subject: |
Re: how to methodically generate a set of rules? |
Date: |
Tue, 28 Mar 2006 06:21:04 -0500 (EST) |
On Tue, 28 Mar 2006, mathieu lacage wrote:
>
> > again, i have a given list of C source files, each of which has the
> > following structure:
> >
> > blah.c:
> >
> > #ifdef OBJ_fred
> > ... what will be compiled to generate fred.o ...
> > #endif
> >
> > #ifdef OBJ_astro
> > ... what will be compiled to generate astro.o
> > #endif
> >
> > ... and so on ...
> >
> > there is no clear pattern between the name of the source file and
> > the names of the object files that it can generate. each source file
> > will be compiled several times, defining a different preprocessor
> > directive each time to generate the corresponding object file. so
> > far, so good?
> >
> > for a file like the one above, the generated makefile rule would
> > resemble:
> >
> > fred.o astro.o: blah.c
> > ... funky rule to build each object file ...
> >
> > now, given the list of source files, for each source file, i could
> > easily generate the list of corresponding object files using "grep"
> > so, for a given ${SRCFILE}, i would have:
> >
> > OBJFILES := $(addsuffix .o,
> > $(shell grep -h "^\#ifdef OBJ_" ${SRCFILE} | \
> > sed -e "s/^\#ifdef OBJ_//"))
> >
>
> let's define a make function:
> gen-obj = $(addsuffix .o, $(shell grep -h "^\#ifdef OBJ_" $(1)} | sed -e
> "s/^\#ifdef OBJ_//"))
> then, a small rule template:
> define rule_template
> $(call gen-obj $(1)): $(1)
> # ... funky rule ... #
> endef
> and then instantiate that template:
> $(foreach src,$(SRC_FILES),$(eval rule_template,$(src))
>
> hope this helps,
immensely. thanks.
rday