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Re: What is wrong with this simple rule in makefile?
From: |
Lin George |
Subject: |
Re: What is wrong with this simple rule in makefile? |
Date: |
Thu, 27 Apr 2006 07:16:00 -0700 (PDT) |
Thanks John,
The problem I am meeting with in my situation is that,
another guy has defined the dependency of %.o to
related %.cpp and header files by using g++ -M to
generate prerequisites automatically (they defined the
rules and the prerequisites, and the body of the rule
is empty to check whether all prerequisites are
up-to-date).
I am not sure there will be
any conflicts (or any re-definition issues) since the
target %.o is defined twice.
Have I made myself understood? :-)
regards,
George
--- John Graham-Cumming <address@hidden> wrote:
> Lin George wrote:
> > I want to use g++ $(CFLAGS) to compile any .cpp
> files
> > into .o files. For example, using g++ $(CFLAGS)
> > foo.cpp to generate foo.o, using g++ $(CFLAGS)
> goo.cpp
> > to generate goo.o. CFLAGS is a variale which I
> defined
> > before. I write a rule in Makefile as,
> >
> > %.o :
> > g++ $(CFLAGS) %.cpp
> >
> > But when executing the Makefile, it reports error
> > message "g++: %.cpp: No such file or directory".
>
> There are two important things wrong with this rule:
>
> 1. You've specified no prerequisite so this rule
> means "in order to
> build any file ending in .o do this". That could be
> incorrect if there
> were .o's that were not built from .cpp files as you
> intend.
>
> 2. You can't say %.cpp in the rule body. That's the
> wrong syntax. What
> you need to do is use the automatic variable $<.
>
> Here's the correct rule:
>
> %.o : %.cpp
> g++ $(CFLAGS) $<
>
> You probably also want to set a bunch of other g++
> options (such as -o),
> but that's a bit out of the range of what you asked.
>
> The other question I would have is why you need to
> define this rule at
> all. Don't GNU Make's built-in rules do what you
> need? GNU Make has the
> following as a built-in:
>
> %.o: %.cpp
> $(COMPILE.cpp) $(OUTPUT_OPTION) $<
>
> where COMPILE.cpp = $(COMPILE.cc) and COMPILE.cc =
> $(CXX) $(CXXFLAGS)
> $(CPPFLAGS) $(TARGET_ARCH) -c and CXX = g++.
>
> So you could use GNU Make's built-in rule and just
> do CXXFLAGS +=
> $(CFLAGS) somewhere in your Makefile and you'd be
> golden.
>
> John.
>
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