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What's wrong about using variables in `define'?
From: |
Pan ruochen |
Subject: |
What's wrong about using variables in `define'? |
Date: |
Wed, 6 Aug 2008 12:28:13 +0800 |
Hi All,
I want to debug a complex called function using temporary variables in `define'.
But something seems wrong.
$cat Makefile
define check
tmpvar=$1
$(warning $(tmpvar))
tmpvar=$2
$(warning $(tmpvar))
endef
$(eval $(call check,V1,V2))
all:
$make -f Makefile
Makefile:7:
Makefile:7:
make: Nothing to be done for `all'.
But if I modify the script to:
$cat Makefile
define check
$(warning $1)
$(warning $2)
endef
$(eval $(call check,V1,V2))
all:
$make
Makefile:4: V1
Makefile:4: V2
make: Nothing to be done for `all'.
Everything is okay. What's wrong about using variables in `define's?
Best Regards,
PRC
Apr 6, 2008
- What's wrong about using variables in `define'?,
Pan ruochen <=