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From: | Chen Jun (陈军) |
Subject: | Dilemer using target-specific or pattern-specific variables |
Date: | Thu, 16 Oct 2008 16:01:22 +0800 |
User-agent: | Thunderbird 2.0.0.17 (Windows/20080914) |
I'm using GNU make 3.81 . I want to filter out -DNDEBUG compiler options(cflags) when compiling my.obj, so the makefile: # Makefile start. all: my.obj his.obj @echo "linking $^" cflags = -c -DNDEBUG -O2 %.obj: @echo "Compile $@: $(cflags)" %.c: @echo "$@" > $@ ### special, target specific variable assignment >>> my.obj: cflags := $(filter-out -DNDEBUG,$(cflags)) ### special <<< # Makefile end. The output is: Compile my.obj: -c -O2 Compile his.obj: -c -DNDEBUG -O2 linking my.obj his.obj The output was in my expectation so far. I have to use ``cflags := '' in the last statement instead of ``cflags = '', because the latter would cause a "references itself" error for cflags. HOWEVER, I immediately realized that using := above is an immediate expasion , that is, cflags expanded when that line is read by GNU make, instead of when my.obj is being made. To illustrate this, see the following makefile: # Makefile start. all: my.obj his.obj @echo "linking $^" cflags = -c -DNDEBUG -O2 %.obj: @echo "Compile $@: $(cflags)" %.c: @echo "$@" > $@ ### special >>> LateDef += -D LATEDEF1 my.obj: cflags := $(LateDef) $(filter-out -DNDEBUG,$(cflags)) LateDef += -D LATEDEF2 ### special <<< # Makefile end. The output now is: Compile my.obj: -D LATEDEF1 -c -O2 Compile his.obj: -c -DNDEBUG -O2 linking my.obj his.obj You see that ``-D LATEDEF2'' is not appended for my.obj – which is what I don't expect. So, I think it is reasonble that expansion of any target/pattern specific variable assignment should be deferred when the corresponding target is being made. By the way, if make provides a ``-='' operation that filters out a word, it would still be better. Any solutions to this problem? Hoping to hear your response. |
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