Understanding Pattern Rules

[james]

Hello!

I am a newcomer to writing my own Makefiles, and I am trying to learn 
how to work with pattern rules. To perform some testing, I have written 
the following simple Makefile:

-- Makefile --
file.out: %.cached
        cat $^ > file.out

%.cached: %.src
        cp $? $@
--------------

I am executing this file in a directory with the following files

$ find -type f
./Makefile
./f2.src
./f1.src
./f3.src

When I execute make, I get the following error.

$ make
make: *** No rule to make target '%.cached', needed by 'file.out'.  
Stop.

I am confused by this, because I can plainly see that I wrote a rule for 
the target '%.cached'. Based on my reading of the manual page and 
examples I've seen in various places, it seems like prerequisites which 
are patterns must match files which already exist on the filesystem, and 
will not match to a corresponding Makefile rule.

My question then becomes, is there a way which I can express implicit 
prerequisites which are defined as targets elsewhere in the Makefile, 
rather than having to have implicit prerequisites match files which 
already exist on the filesystem?

Thanks in advance for any pointers!