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Re: Issue with foreach statement
From: |
Paul Smith |
Subject: |
Re: Issue with foreach statement |
Date: |
Wed, 27 Jul 2016 14:23:31 -0400 |
On Wed, 2016-07-27 at 11:26 -0600, Brian Vandenberg wrote:
> Fortunately this is rather easy to reproduce without foreach:
>
> >
> > $ cat /tmp/makefile
> >
> > define TEST_MACRO =
> > $(eval a=b)
> > $(eval a=b)
> > endef
> >
> > $(call TEST_MACRO)
> >
> > $ make -f /tmp/makefile
> > /tmp/makefile:8: *** missing separator. Stop.
> The issue is that the evaluation of TEST_MACRO produced a non-empty
> string consisting of whitespace.
Ah. It's even simpler to reproduce:
define TEST_MACRO
endef
$(call TEST_MACRO)
(note that's two blank lines in the define)
It's not whitespace per se, it's the newline. Just using spaces alone
won't cause a problem. This probably SHOULD be considered a bug in
make; it should be able to ignore blank lines in this context just like
whitespace.
> You can resolve this problem by wrapping the foreach in a $(strip):
>
> >
> > $(strip $(foreach ...))
Yes, and also you can just write:
TEST_MACRO = $(eval a=a) $(eval b=b)
(you don't need define/endef for this) which also ensures there are no
newlines in the content of TEST_MACRO.