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Re: Limiting expansion of make variables
From: |
John Calcote |
Subject: |
Re: Limiting expansion of make variables |
Date: |
Tue, 18 Apr 2017 09:21:32 -0600 |
Actually, use \$$. Double the dollar sign to escape it for make. Prepend
the slash (or put it in single quotes) to keep the shell from expanding it.
On Apr 18, 2017 10:16 AM, "John Calcote" <address@hidden> wrote:
> Use \$.
>
> On Apr 18, 2017 10:14 AM, "Richard Cavell" <address@hidden> wrote:
>
>> Hello all. For debugging purposes, I am trying to put this into my
>> makefile:
>>
>> .PHONY: dumpvars
>>
>> dumpvars: source.c source.h
>> @echo "$(RM) is " $(RM)
>> @echo "$? expands to : " $?
>>
>> and so on. But obviously, Make is expanding all instances of the
>> variables' names. How do I prevent this?
>>
>> TIA,
>> Richard
>> _______________________________________________
>> Help-make mailing list
>> address@hidden
>> https://lists.gnu.org/mailman/listinfo/help-make
>>
>