my rules are ignored in favour of implicit rules.

[andreas graeper]

i have one object .o and one executable. if the object .o is build then my
own rule for executable is used, otherwise implicit rule is used:

cc=gcc -Wall -Wextra ..
ln=-lxxx
os=x.o
xs=m

%: %.c $(os)
 cc -o $@ $^ $(ln)

%.o: %.c %.h
 $(cc) -o $@ -c $<

make x.o ; make m     ## works fine
make                          ## uses implicit rule     'CC m.c -o m'

i never before had such problems. i used it that way for years.
thank you in advance.