[Ltib] How to skip command-line question based kernel configuration when doing Kernel 2.6.34 configuration for Phytec LPC32xx board ?

[Quentin YANG]

Hi,

Regarding latest Linux Kernel configuration when chosing "Kernel_2.6.34" for Phytec board.

WHY LTIB is STILL ASKING THE KERNEL CONFIGURATION in COMMAND-LINE after I've finished all kernel configuratino in GUI? 
Very time consuming to go through and answer each question. 

Can anyone tell me how to skip these command-line questions AS SHOWN BELOW?  Thanks a lot.

.................................

Add support for standard UART3 (ARCH_LPC32XX_UART3_SELECT) [N/y/?] (NEW) n
Add support for standard UART4 (ARCH_LPC32XX_UART4_SELECT) [N/y/?] (NEW) n
Add support for standard UART5 (ARCH_LPC32XX_UART5_SELECT) [Y/n/?] (NEW) n
Add support for standard UART6 (ARCH_LPC32XX_UART6_SELECT) [N/y/?] (NEW) n
*
* High speed UARTS
*
Add support for high speed UART1 (ARCH_LPC32XX_HSUART1_SELECT) [N/y/?] (NEW) n
Add support for high speed UART2 (ARCH_LPC32XX_HSUART2_SELECT) [N/y/?] (NEW) n
Add support for high speed UART7 (ARCH_LPC32XX_HSUART7_SELECT) [N/y/?] (NEW) n
*
* LPC32XX chip components
*
Use IRAM for network buffers (ARCH_LPC32XX_IRAM_FOR_NET) [N/y/?] (NEW) n
Check to enable MII support or leave disabled for RMII support (ARCH_LPC32XX_MII_SUPPORT) [N/y/?] (NEW) y
*
* Processor Type
*
*
* Processor Features
*
Support Thumb user binaries (ARM_THUMB) [Y/n/?] y
Disable I-Cache (I-bit) (CPU_ICACHE_DISABLE) [N/y/?] n
Disable D-Cache (C-bit) (CPU_DCACHE_DISABLE) [N/y/?] n
Force write through D-cache (CPU_DCACHE_WRITETHROUGH) [N/y/?] n
Round robin I and D cache replacement algorithm (CPU_CACHE_ROUND_ROBIN) [N/y/?] n
*
* Kernel Features
*
Tickless System (Dynamic Ticks) (NO_HZ) [N/y/?] n
High Resolution Timer Support (HIGH_RES_TIMERS) [N/y/?] n
Memory split
> 1. 3G/1G user/kernel split (VMSPLIT_3G) (NEW)
  2. 2G/2G user/kernel split (VMSPLIT_2G) (NEW)
  3. 1G/3G user/kernel split (VMSPLIT_1G) (NEW)
............................................



Regards,
Quentin