Re: [lwip-users] Problem running lwip on cortex M7 with D cache enabled

[goldsimon]

Jan Menzel wrote:
> I'd suggest to align (position and size) all receive
>buffers to d-cache lines so that invalidation does not cause any side
>effects.

And it's exactly this that lwip does not fully support yet. It doesn't work for 
the tx side at all and for the rx side, we only have the workaraound with 
custom pbufs (see the link Dirk posted).

Simon