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[paparazzi-commits] [6290] moved imu arch out of subsystem to arch in sw


From: Felix Ruess
Subject: [paparazzi-commits] [6290] moved imu arch out of subsystem to arch in sw/airborne
Date: Wed, 27 Oct 2010 23:40:58 +0000

Revision: 6290
          http://svn.sv.gnu.org/viewvc/?view=rev&root=paparazzi&revision=6290
Author:   flixr
Date:     2010-10-27 23:40:58 +0000 (Wed, 27 Oct 2010)
Log Message:
-----------
moved imu arch out of subsystem to arch in sw/airborne

Modified Paths:
--------------
    
paparazzi3/trunk/conf/autopilot/subsystems/lisa_passthrough/imu_b2_v1.1.makefile
    
paparazzi3/trunk/conf/autopilot/subsystems/lisa_passthrough/imu_b2_v1.2.makefile
    paparazzi3/trunk/conf/autopilot/subsystems/rotorcraft/imu_b2_v1.0.makefile
    paparazzi3/trunk/conf/autopilot/subsystems/rotorcraft/imu_b2_v1.1.makefile
    paparazzi3/trunk/conf/autopilot/subsystems/rotorcraft/imu_b2_v1.2.makefile
    paparazzi3/trunk/conf/autopilot/subsystems/rotorcraft/imu_crista.makefile
    paparazzi3/trunk/sw/airborne/subsystems/imu/imu_aspirin.h
    paparazzi3/trunk/sw/airborne/subsystems/imu/imu_b2.h
    paparazzi3/trunk/sw/airborne/subsystems/imu/imu_crista.h
    paparazzi3/trunk/sw/airborne/subsystems/imu.c

Added Paths:
-----------
    paparazzi3/trunk/sw/airborne/arch/lpc21/subsystems/imu/
    paparazzi3/trunk/sw/airborne/arch/lpc21/subsystems/imu/imu_b2_arch.c
    paparazzi3/trunk/sw/airborne/arch/lpc21/subsystems/imu/imu_b2_arch.h
    paparazzi3/trunk/sw/airborne/arch/lpc21/subsystems/imu/imu_crista_arch.c
    paparazzi3/trunk/sw/airborne/arch/lpc21/subsystems/imu/imu_crista_arch.h
    paparazzi3/trunk/sw/airborne/arch/sim/subsystems/imu/
    paparazzi3/trunk/sw/airborne/arch/sim/subsystems/imu/imu_b2_arch.c
    paparazzi3/trunk/sw/airborne/arch/sim/subsystems/imu/imu_b2_arch.h
    paparazzi3/trunk/sw/airborne/arch/sim/subsystems/imu/imu_crista_arch.c
    paparazzi3/trunk/sw/airborne/arch/sim/subsystems/imu/imu_crista_arch.h
    paparazzi3/trunk/sw/airborne/arch/stm32/subsystems/imu/
    paparazzi3/trunk/sw/airborne/arch/stm32/subsystems/imu/imu_aspirin_arch.c
    paparazzi3/trunk/sw/airborne/arch/stm32/subsystems/imu/imu_aspirin_arch.h
    paparazzi3/trunk/sw/airborne/arch/stm32/subsystems/imu/imu_b2_arch.c
    paparazzi3/trunk/sw/airborne/arch/stm32/subsystems/imu/imu_b2_arch.h
    paparazzi3/trunk/sw/airborne/arch/stm32/subsystems/imu/imu_crista_arch.c
    paparazzi3/trunk/sw/airborne/arch/stm32/subsystems/imu/imu_crista_arch.h

Removed Paths:
-------------
    paparazzi3/trunk/sw/airborne/subsystems/imu/arch/

Modified: 
paparazzi3/trunk/conf/autopilot/subsystems/lisa_passthrough/imu_b2_v1.1.makefile
===================================================================
--- 
paparazzi3/trunk/conf/autopilot/subsystems/lisa_passthrough/imu_b2_v1.1.makefile
    2010-10-27 23:40:48 UTC (rev 6289)
+++ 
paparazzi3/trunk/conf/autopilot/subsystems/lisa_passthrough/imu_b2_v1.1.makefile
    2010-10-27 23:40:58 UTC (rev 6290)
@@ -40,44 +40,49 @@
 
 
 # imu Booz2 v1.1
-$(TARGET).CFLAGS += -DIMU_TYPE_H=\"imu/imu_b2.h\"
-$(TARGET).CFLAGS += -DIMU_B2_MAG_TYPE=IMU_B2_MAG_MS2001
-$(TARGET).CFLAGS += -DIMU_B2_VERSION_1_1
-$(TARGET).srcs += $(SRC_SUBSYSTEMS)/imu.c                   \
-                  $(SRC_SUBSYSTEMS)/imu/imu_b2.c            \
-                  $(SRC_SUBSYSTEMS)/imu/arch/$(ARCH)/imu_b2_arch.c
 
-$(TARGET).srcs += peripherals/max1168.c \
-                  $(SRC_ARCH)/peripherals/max1168_arch.c
+imu_CFLAGS += -DIMU_TYPE_H=\"subsystems/imu/imu_b2.h\"
+imu_CFLAGS += -DIMU_B2_MAG_TYPE=IMU_B2_MAG_MS2001
+imu_CFLAGS += -DIMU_B2_VERSION_1_1
+imu_srcs += $(SRC_SUBSYSTEMS)/imu.c
+imu_srcs += $(SRC_SUBSYSTEMS)/imu/imu_b2.c
+imu_srcs += $(SRC_ARCH)/subsystems/imu/imu_b2_arch.c
 
-$(TARGET).srcs += peripherals/ms2001.c \
-                  $(SRC_ARCH)/peripherals/ms2001_arch.c
+imu_srcs += peripherals/max1168.c
+imu_srcs += $(SRC_ARCH)/peripherals/max1168_arch.c
 
+imu_srcs += peripherals/ms2001.c
+imu_srcs += $(SRC_ARCH)/peripherals/ms2001_arch.c
+
 ifeq ($(ARCH), lpc21)
-$(TARGET).CFLAGS += -DSSP_VIC_SLOT=9
-$(TARGET).CFLAGS += -DMAX1168_EOC_VIC_SLOT=8
-$(TARGET).CFLAGS += -DMS2001_DRDY_VIC_SLOT=11
+imu_CFLAGS += -DSSP_VIC_SLOT=9
+imu_CFLAGS += -DMAX1168_EOC_VIC_SLOT=8
+imu_CFLAGS += -DMS2001_DRDY_VIC_SLOT=11
 else ifeq ($(ARCH), stm32)
-$(TARGET).CFLAGS += -DUSE_SPI2 -DUSE_DMA1_C4_IRQ -DUSE_EXTI2_IRQ -DUSE_SPI2_IRQ
-$(TARGET).CFLAGS += -DMAX_1168_DRDY_PORT=$(MAX_1168_DRDY_PORT)
-$(TARGET).CFLAGS += -DMAX_1168_DRDY_PORT_SOURCE=$(MAX_1168_DRDY_PORT_SOURCE)
+imu_CFLAGS += -DUSE_SPI2 -DUSE_DMA1_C4_IRQ -DUSE_EXTI2_IRQ -DUSE_SPI2_IRQ
+imu_CFLAGS += -DMAX_1168_DRDY_PORT=$(MAX_1168_DRDY_PORT)
+imu_CFLAGS += -DMAX_1168_DRDY_PORT_SOURCE=$(MAX_1168_DRDY_PORT_SOURCE)
 endif
 
+# Keep CFLAGS/Srcs for imu in separate expression so we can assign it to other 
targets
+# see: conf/autopilot/subsystems/lisa_passthrough/imu_b2_v1.1.makefile for 
example
+stm_passthrough.CFLAGS += $(imu_CFLAGS)
+stm_passthrough.srcs += $(imu_srcs)
+
 #
 # Simulator
 #
 
-sim.CFLAGS += -DIMU_TYPE_H=\"imu/imu_b2.h\"
+sim.CFLAGS += -DIMU_TYPE_H=\"subsystems/imu/imu_b2.h\"
+sim.CFLAGS += -DIMU_B2_MAG_TYPE=IMU_B2_MAG_AMI601
 sim.CFLAGS += -DIMU_B2_VERSION_1_1
-sim.CFLAGS += -DIMU_B2_MAG_TYPE=IMU_B2_MAG_AMI601
-sim.srcs += $(SRC_SUBSYSTEMS)/imu.c                 \
-                       $(SRC_SUBSYSTEMS)/imu/imu_b2.c          \
-                       $(SRC_BOOZ_SIM)/imu/imu_b2_arch.c
+sim.srcs += $(SRC_SUBSYSTEMS)/imu.c
+sim.srcs += $(SRC_SUBSYSTEMS)/imu/imu_b2.c
+sim.srcs += $(SRC_ARCH)/subsystems/imu/imu_b2_arch.c
 
+sim.srcs += peripherals/max1168.c
+sim.srcs += $(SRC_ARCH)/peripherals/max1168_arch.c
 
-sim.srcs += peripherals/max1168.c \
-                       $(SRC_ARCH)/peripherals/max1168_arch.c
-
 sim.CFLAGS += -DUSE_AMI601
-sim.srcs += peripherals/ami601.c
+sim.srcs   += peripherals/ami601.c
 sim.CFLAGS += -DUSE_I2C1

Modified: 
paparazzi3/trunk/conf/autopilot/subsystems/lisa_passthrough/imu_b2_v1.2.makefile
===================================================================
--- 
paparazzi3/trunk/conf/autopilot/subsystems/lisa_passthrough/imu_b2_v1.2.makefile
    2010-10-27 23:40:48 UTC (rev 6289)
+++ 
paparazzi3/trunk/conf/autopilot/subsystems/lisa_passthrough/imu_b2_v1.2.makefile
    2010-10-27 23:40:58 UTC (rev 6290)
@@ -41,25 +41,23 @@
 
 # imu Booz2 v1.2
 
-# add imu arch to include directories
-imu_CFLAGS += -I$(SRC_SUBSYSTEMS)/imu/arch/$(ARCH)
-
-imu_CFLAGS += -DIMU_TYPE_H=\"imu/imu_b2.h\"
+imu_CFLAGS += -DIMU_TYPE_H=\"subsystems/imu/imu_b2.h\"
 imu_CFLAGS += -DIMU_B2_MAG_TYPE=IMU_B2_MAG_HMC5843
 imu_CFLAGS += -DIMU_B2_VERSION_1_2
-imu_srcs += $(SRC_SUBSYSTEMS)/imu.c                   \
-           $(SRC_SUBSYSTEMS)/imu/imu_b2.c            \
-           $(SRC_SUBSYSTEMS)/imu/arch/$(ARCH)/imu_b2_arch.c
+imu_srcs += $(SRC_SUBSYSTEMS)/imu.c
+imu_srcs += $(SRC_SUBSYSTEMS)/imu/imu_b2.c
+imu_srcs += $(SRC_ARCH)/subsystems/imu/imu_b2_arch.c
 
-imu_srcs += peripherals/max1168.c \
-            $(SRC_ARCH)/peripherals/max1168_arch.c
+imu_srcs += peripherals/max1168.c
+imu_srcs += $(SRC_ARCH)/peripherals/max1168_arch.c
 
-imu_srcs += peripherals/hmc5843.c \
-            $(SRC_BOOZ_ARCH)/peripherals/hmc5843_arch.c
+imu_srcs += peripherals/hmc5843.c
+imu_srcs += $(SRC_ARCH)/peripherals/hmc5843_arch.c
 
 ifeq ($(ARCH), lpc21)
 imu_CFLAGS += -DSSP_VIC_SLOT=9
 imu_CFLAGS += -DMAX1168_EOC_VIC_SLOT=8
+#FIXME ms2001 not used on this imu
 imu_CFLAGS += -DMS2001_DRDY_VIC_SLOT=11
 else ifeq ($(ARCH), stm32)
 imu_CFLAGS += -DUSE_SPI2 -DUSE_DMA1_C4_IRQ -DUSE_EXTI2_IRQ -DUSE_SPI2_IRQ
@@ -77,18 +75,17 @@
 # Simulator
 #
 
-# add imu arch to include directories
-sim.CFLAGS += -I$(SRC_SUBSYSTEMS)/imu/arch/$(ARCH)
-
-sim.CFLAGS += -DIMU_TYPE_H=\"imu/imu_b2.h\"
-sim.CFLAGS += -DIMU_B2_VERSION_1_1
+sim.CFLAGS += -DIMU_TYPE_H=\"subsystems/imu/imu_b2.h\"
+#FIXME, should be HMC5843
 sim.CFLAGS += -DIMU_B2_MAG_TYPE=IMU_B2_MAG_AMI601
-sim.srcs += $(SRC_SUBSYSTEMS)/imu.c                   \
-            $(SRC_SUBSYSTEMS)/imu/imu_b2.c            \
-            $(SRC_SUBSYSTEMS)/imu/arch/$(ARCH)/imu_b2_arch.c
+#FIXME, should be verision 1.2
+sim.CFLAGS += -DIMU_B2_VERSION_1_1
+sim.srcs += $(SRC_SUBSYSTEMS)/imu.c
+sim.srcs += $(SRC_SUBSYSTEMS)/imu/imu_b2.c
+sim.srcs += $(SRC_ARCH)/subsystems/imu/imu_b2_arch.c
 
-sim.srcs += peripherals/max1168.c \
-            $(SRC_ARCH)/peripherals/max1168_arch.c
+sim.srcs += peripherals/max1168.c
+sim.srcs += $(SRC_ARCH)/peripherals/max1168_arch.c
 
 sim.CFLAGS += -DUSE_AMI601
 sim.srcs   += peripherals/ami601.c

Modified: 
paparazzi3/trunk/conf/autopilot/subsystems/rotorcraft/imu_b2_v1.0.makefile
===================================================================
--- paparazzi3/trunk/conf/autopilot/subsystems/rotorcraft/imu_b2_v1.0.makefile  
2010-10-27 23:40:48 UTC (rev 6289)
+++ paparazzi3/trunk/conf/autopilot/subsystems/rotorcraft/imu_b2_v1.0.makefile  
2010-10-27 23:40:58 UTC (rev 6290)
@@ -36,43 +36,42 @@
 
 # imu Booz2 v1
 
-# add imu arch to include directories
-ap.CFLAGS += -I$(SRC_SUBSYSTEMS)/imu/arch/$(ARCH)
+imu_CFLAGS += -DIMU_TYPE_H=\"subsystems/imu/imu_b2.h\"
+imu_CFLAGS += -DIMU_B2_MAG_TYPE=IMU_B2_MAG_AMI601
+imu_CFLAGS += -DIMU_B2_VERSION_1_0
+imu_srcs += $(SRC_SUBSYSTEMS)/imu.c
+imu_srcs += $(SRC_SUBSYSTEMS)/imu/imu_b2.c
+imu_srcs += $(SRC_ARCH)/subsystems/imu/imu_b2_arch.c
+imu_CFLAGS += -DSSP_VIC_SLOT=9
 
-ap.CFLAGS += -DIMU_TYPE_H=\"imu/imu_b2.h\"
-ap.CFLAGS += -DIMU_B2_VERSION_1_0
-ap.CFLAGS += -DIMU_B2_MAG_TYPE=IMU_B2_MAG_AMI601
-ap.CFLAGS += -DSSP_VIC_SLOT=9
-ap.srcs += $(SRC_SUBSYSTEMS)/imu.c                   \
-           $(SRC_SUBSYSTEMS)/imu/imu_b2.c            \
-           $(SRC_SUBSYSTEMS)/imu/arch/$(ARCH)/imu_b2_arch.c
+imu_srcs += peripherals/max1168.c
+imu_srcs += $(SRC_ARCH)/peripherals/max1168_arch.c
+imu_CFLAGS += -DMAX1168_EOC_VIC_SLOT=8
 
-ap.CFLAGS += -DMAX1168_EOC_VIC_SLOT=8
-ap.srcs += peripherals/max1168.c \
-           $(SRC_ARCH)/peripherals/max1168_arch.c
+imu_CFLAGS += -DUSE_AMI601
+imu_srcs += peripherals/ami601.c
+imu_CFLAGS += -DUSE_I2C1  -DI2C1_SCLL=150 -DI2C1_SCLH=150 -DI2C1_VIC_SLOT=11
 
-ap.CFLAGS += -DUSE_AMI601
-ap.srcs += peripherals/ami601.c
-ap.CFLAGS += -DUSE_I2C1  -DI2C1_SCLL=150 -DI2C1_SCLH=150 -DI2C1_VIC_SLOT=11
 
+# Keep CFLAGS/Srcs for imu in separate expression so we can assign it to other 
targets
+# see: conf/autopilot/subsystems/lisa_passthrough/imu_b2_v1.1.makefile for 
example
+ap.CFLAGS += $(imu_CFLAGS)
+ap.srcs += $(imu_srcs)
 
 #
 # Simulator
 #
 
-# add imu arch to include directories
-sim.CFLAGS += -I$(SRC_SUBSYSTEMS)/imu/arch/$(ARCH)
-
-sim.CFLAGS += -DIMU_TYPE_H=\"imu/imu_b2.h\"
-sim.CFLAGS += -DIMU_B2_VERSION_1_0
+sim.CFLAGS += -DIMU_TYPE_H=\"subsystems/imu/imu_b2.h\"
 sim.CFLAGS += -DIMU_B2_MAG_TYPE=IMU_B2_MAG_AMI601
-sim.srcs += $(SRC_SUBSYSTEMS)/imu.c                   \
-           $(SRC_SUBSYSTEMS)/imu/imu_b2.c            \
-           $(SRC_SUBSYSTEMS)/imu/arch/$(ARCH)/imu_b2_arch.c
+sim.CFLAGS += -DIMU_B2_VERSION_1_0
+sim.srcs += $(SRC_SUBSYSTEMS)/imu.c
+sim.srcs += $(SRC_SUBSYSTEMS)/imu/imu_b2.c
+sim.srcs += $(SRC_ARCH)/subsystems/imu/imu_b2_arch.c
 
-sim.srcs += peripherals/max1168.c \
-            $(SRC_ARCH)/peripherals/max1168_arch.c
+sim.srcs += peripherals/max1168.c
+sim.srcs += $(SRC_ARCH)/peripherals/max1168_arch.c
 
 sim.CFLAGS += -DUSE_AMI601
-sim.srcs += peripherals/ami601.c
+sim.srcs   += peripherals/ami601.c
 sim.CFLAGS += -DUSE_I2C1

Modified: 
paparazzi3/trunk/conf/autopilot/subsystems/rotorcraft/imu_b2_v1.1.makefile
===================================================================
--- paparazzi3/trunk/conf/autopilot/subsystems/rotorcraft/imu_b2_v1.1.makefile  
2010-10-27 23:40:48 UTC (rev 6289)
+++ paparazzi3/trunk/conf/autopilot/subsystems/rotorcraft/imu_b2_v1.1.makefile  
2010-10-27 23:40:58 UTC (rev 6290)
@@ -41,21 +41,18 @@
 
 # imu Booz2 v1.1
 
-# add imu arch to include directories
-ap.CFLAGS += -I$(SRC_SUBSYSTEMS)/imu/arch/$(ARCH)
-
-imu_CFLAGS += -DIMU_TYPE_H=\"imu/imu_b2.h\"
+imu_CFLAGS += -DIMU_TYPE_H=\"subsystems/imu/imu_b2.h\"
 imu_CFLAGS += -DIMU_B2_MAG_TYPE=IMU_B2_MAG_MS2001
 imu_CFLAGS += -DIMU_B2_VERSION_1_1
-ap.srcs += $(SRC_SUBSYSTEMS)/imu.c                   \
-           $(SRC_SUBSYSTEMS)/imu/imu_b2.c            \
-           $(SRC_SUBSYSTEMS)/imu/arch/$(ARCH)/imu_b2_arch.c
+imu_srcs += $(SRC_SUBSYSTEMS)/imu.c
+imu_srcs += $(SRC_SUBSYSTEMS)/imu/imu_b2.c
+imu_srcs += $(SRC_ARCH)/subsystems/imu/imu_b2_arch.c
 
-imu_srcs += peripherals/max1168.c \
-            $(SRC_ARCH)/peripherals/max1168_arch.c
+imu_srcs += peripherals/max1168.c
+imu_srcs += $(SRC_ARCH)/peripherals/max1168_arch.c
 
-imu_srcs += peripherals/ms2001.c \
-            $(SRC_ARCH)/peripherals/ms2001_arch.c
+imu_srcs += peripherals/ms2001.c
+imu_srcs += $(SRC_ARCH)/peripherals/ms2001_arch.c
 
 ifeq ($(ARCH), lpc21)
 imu_CFLAGS += -DSSP_VIC_SLOT=9
@@ -76,18 +73,15 @@
 # Simulator
 #
 
-# add imu arch to include directories
-sim.CFLAGS += -I$(SRC_SUBSYSTEMS)/imu/arch/$(ARCH)
-
-sim.CFLAGS += -DIMU_TYPE_H=\"imu/imu_b2.h\"
-sim.CFLAGS += -DIMU_B2_VERSION_1_1
+sim.CFLAGS += -DIMU_TYPE_H=\"subsystems/imu/imu_b2.h\"
 sim.CFLAGS += -DIMU_B2_MAG_TYPE=IMU_B2_MAG_AMI601
-sim.srcs += $(SRC_SUBSYSTEMS)/imu.c                   \
-            $(SRC_SUBSYSTEMS)/imu/imu_b2.c            \
-            $(SRC_SUBSYSTEMS)/imu/arch/$(ARCH)/imu_b2_arch.c
+sim.CFLAGS += -DIMU_B2_VERSION_1_1
+sim.srcs += $(SRC_SUBSYSTEMS)/imu.c
+sim.srcs += $(SRC_SUBSYSTEMS)/imu/imu_b2.c
+sim.srcs += $(SRC_ARCH)/subsystems/imu/imu_b2_arch.c
 
-sim.srcs += peripherals/max1168.c \
-            $(SRC_ARCH)/peripherals/max1168_arch.c
+sim.srcs += peripherals/max1168.c
+sim.srcs += $(SRC_ARCH)/peripherals/max1168_arch.c
 
 sim.CFLAGS += -DUSE_AMI601
 sim.srcs   += peripherals/ami601.c

Modified: 
paparazzi3/trunk/conf/autopilot/subsystems/rotorcraft/imu_b2_v1.2.makefile
===================================================================
--- paparazzi3/trunk/conf/autopilot/subsystems/rotorcraft/imu_b2_v1.2.makefile  
2010-10-27 23:40:48 UTC (rev 6289)
+++ paparazzi3/trunk/conf/autopilot/subsystems/rotorcraft/imu_b2_v1.2.makefile  
2010-10-27 23:40:58 UTC (rev 6290)
@@ -41,26 +41,23 @@
 
 # imu Booz2 v1.2
 
-# add imu arch to include directories
-imu_CFLAGS += -I$(SRC_SUBSYSTEMS)/imu/arch/$(ARCH)
-
-imu_CFLAGS += -DIMU_TYPE_H=\"imu/imu_b2.h\"
+imu_CFLAGS += -DIMU_TYPE_H=\"subsystems/imu/imu_b2.h\"
 imu_CFLAGS += -DIMU_B2_MAG_TYPE=IMU_B2_MAG_HMC5843
 imu_CFLAGS += -DIMU_B2_VERSION_1_2
-imu_srcs += $(SRC_SUBSYSTEMS)/imu.c                   \
-           $(SRC_SUBSYSTEMS)/imu/imu_b2.c            \
-           $(SRC_SUBSYSTEMS)/imu/arch/$(ARCH)/imu_b2_arch.c
+imu_srcs += $(SRC_SUBSYSTEMS)/imu.c
+imu_srcs += $(SRC_SUBSYSTEMS)/imu/imu_b2.c
+imu_srcs += $(SRC_ARCH)/subsystems/imu/imu_b2_arch.c
 
-imu_srcs += peripherals/max1168.c \
-            $(SRC_ARCH)/peripherals/max1168_arch.c
+imu_srcs += peripherals/max1168.c
+imu_srcs += $(SRC_ARCH)/peripherals/max1168_arch.c
 
-imu_srcs += i2c.c $(SRC_ARCH)/i2c_hw.c
-imu_srcs += peripherals/hmc5843.c \
-            $(SRC_BOOZ_ARCH)/peripherals/hmc5843_arch.c
+imu_srcs += peripherals/hmc5843.c
+imu_srcs += $(SRC_ARCH)/peripherals/hmc5843_arch.c
 
 ifeq ($(ARCH), lpc21)
 imu_CFLAGS += -DSSP_VIC_SLOT=9
 imu_CFLAGS += -DMAX1168_EOC_VIC_SLOT=8
+#FIXME ms2001 not used on this imu
 imu_CFLAGS += -DMS2001_DRDY_VIC_SLOT=11
 else ifeq ($(ARCH), stm32)
 imu_CFLAGS += -DUSE_SPI2 -DUSE_DMA1_C4_IRQ -DUSE_EXTI2_IRQ -DUSE_SPI2_IRQ
@@ -71,25 +68,24 @@
 
 # Keep CFLAGS/Srcs for imu in separate expression so we can assign it to other 
targets
 # see: conf/autopilot/subsystems/lisa_passthrough/imu_b2_v1.1.makefile for 
example
-ap.CFLAGS += $(imu_CFLAGS)
-ap.srcs += $(imu_srcs)
+stm_passthrough.CFLAGS += $(imu_CFLAGS)
+stm_passthrough.srcs += $(imu_srcs)
 
 #
 # Simulator
 #
 
-# add imu arch to include directories
-sim.CFLAGS += -I$(SRC_SUBSYSTEMS)/imu/arch/$(ARCH)
-
-sim.CFLAGS += -DIMU_TYPE_H=\"imu/imu_b2.h\"
-sim.CFLAGS += -DIMU_B2_VERSION_1_1
+sim.CFLAGS += -DIMU_TYPE_H=\"subsystems/imu/imu_b2.h\"
+#FIXME, should be HMC5843
 sim.CFLAGS += -DIMU_B2_MAG_TYPE=IMU_B2_MAG_AMI601
-sim.srcs += $(SRC_SUBSYSTEMS)/imu.c                   \
-            $(SRC_SUBSYSTEMS)/imu/imu_b2.c            \
-            $(SRC_SUBSYSTEMS)/imu/arch/$(ARCH)/imu_b2_arch.c
+#FIXME, should be verision 1.2
+sim.CFLAGS += -DIMU_B2_VERSION_1_1
+sim.srcs += $(SRC_SUBSYSTEMS)/imu.c
+sim.srcs += $(SRC_SUBSYSTEMS)/imu/imu_b2.c
+sim.srcs += $(SRC_ARCH)/subsystems/imu/imu_b2_arch.c
 
-sim.srcs += peripherals/max1168.c \
-            $(SRC_ARCH)/peripherals/max1168_arch.c
+sim.srcs += peripherals/max1168.c
+sim.srcs += $(SRC_ARCH)/peripherals/max1168_arch.c
 
 sim.CFLAGS += -DUSE_AMI601
 sim.srcs   += peripherals/ami601.c

Modified: 
paparazzi3/trunk/conf/autopilot/subsystems/rotorcraft/imu_crista.makefile
===================================================================
--- paparazzi3/trunk/conf/autopilot/subsystems/rotorcraft/imu_crista.makefile   
2010-10-27 23:40:48 UTC (rev 6289)
+++ paparazzi3/trunk/conf/autopilot/subsystems/rotorcraft/imu_crista.makefile   
2010-10-27 23:40:58 UTC (rev 6290)
@@ -58,33 +58,37 @@
 #
 #
 
+# imu Crista
 
+imu_CFLAGS += -DIMU_TYPE_H=\"subsystems/imu/imu_crista.h\"
+imu_srcs += $(SRC_SUBSYSTEMS)/imu.c
+imu_srcs += $(SRC_SUBSYSTEMS)/imu/imu_crista.c
+imu_srcs += $(SRC_ARCH)/subsystems/imu/imu_crista_arch.c
 
-# add imu arch to include directories
-ap.CFLAGS += -I$(SRC_SUBSYSTEMS)/imu/arch/$(ARCH)
+imu_CFLAGS += -DUSE_AMI601
+imu_srcs   += peripherals/ami601.c
+imu_CFLAGS += -DUSE_I2C1
 
-ap.CFLAGS += -DIMU_TYPE_H=\"imu/imu_crista.h\"
-ap.srcs += $(SRC_SUBSYSTEMS)/imu.c            \
-           $(SRC_SUBSYSTEMS)/imu/imu_crista.c \
-           $(SRC_SUBSYSTEMS)/imu/arch/$(ARCH)/imu_crista_arch.c
+ifeq ($(ARCH), lpc21)
+imu_CFLAGS += -DI2C1_SCLL=150 -DI2C1_SCLH=150 -DI2C1_VIC_SLOT=11 
-DI2C1_BUF_LEN=16
+else ifeq ($(ARCH), stm32)
+#FIXME
+endif
 
-ap.CFLAGS += -DUSE_AMI601
-ap.srcs   += peripherals/ami601.c
-ap.CFLAGS += -DUSE_I2C1  -DI2C1_SCLL=150 -DI2C1_SCLH=150 -DI2C1_VIC_SLOT=11 
-DI2C1_BUF_LEN=16
+# Keep CFLAGS/Srcs for imu in separate expression so we can assign it to other 
targets
+# see: conf/autopilot/subsystems/lisa_passthrough/imu_b2_v1.1.makefile for 
example
+ap.CFLAGS += $(imu_CFLAGS)
+ap.srcs += $(imu_srcs)
 
-
 #
 # Simulator
 #
 
-# add imu arch to include directories
-sim.CFLAGS += -I$(SRC_SUBSYSTEMS)/imu/arch/$(ARCH)
+sim.CFLAGS += -DIMU_TYPE_H=\"subsystems/imu/imu_crista.h\"
+sim.srcs += $(SRC_SUBSYSTEMS)/imu.c
+sim.srcs += $(SRC_SUBSYSTEMS)/imu/imu_crista.c
+sim.srcs += $(SRC_ARCH)/subsystems/imu/imu_crista_arch.c
 
-sim.CFLAGS += -DIMU_TYPE_H=\"imu/imu_crista.h\"
-sim.srcs   += $(SRC_SUBSYSTEMS)/imu.c                 \
-              $(SRC_SUBSYSTEMS)/imu/imu_crista.c     \
-              $(SRC_SUBSYSTEMS)/imu/arch/$(ARCH)/imu_crista_arch.c
-
 sim.CFLAGS += -DUSE_AMI601
 sim.srcs   += peripherals/ami601.c
 sim.CFLAGS += -DUSE_I2C1

Copied: paparazzi3/trunk/sw/airborne/arch/lpc21/subsystems/imu/imu_b2_arch.c 
(from rev 6289, 
paparazzi3/trunk/sw/airborne/subsystems/imu/arch/lpc21/imu_b2_arch.c)
===================================================================
--- paparazzi3/trunk/sw/airborne/arch/lpc21/subsystems/imu/imu_b2_arch.c        
                        (rev 0)
+++ paparazzi3/trunk/sw/airborne/arch/lpc21/subsystems/imu/imu_b2_arch.c        
2010-10-27 23:40:58 UTC (rev 6290)
@@ -0,0 +1,189 @@
+/*
+ * $Id$
+ *
+ * Copyright (C) 2008-2009 Antoine Drouin <address@hidden>
+ *
+ * This file is part of paparazzi.
+ *
+ * paparazzi is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2, or (at your option)
+ * any later version.
+ *
+ * paparazzi is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with paparazzi; see the file COPYING.  If not, write to
+ * the Free Software Foundation, 59 Temple Place - Suite 330,
+ * Boston, MA 02111-1307, USA.
+ */
+
+#include "subsystems/imu.h"
+
+volatile uint8_t imu_ssp_status;
+static void SSP_ISR(void) __attribute__((naked));
+#if 0
+static inline bool_t isr_try_mag(void);
+#endif
+
+/* SSPCR0 settings */
+#define SSP_DDS8  0x07 << 0  /* data size         : 8 bits                    
*/
+#define SSP_DDS16 0x0F << 0  /* data size         : 16 bits                   
*/
+#define SSP_FRF   0x00 << 4  /* frame format      : SPI                       
*/
+#define SSP_CPOL  0x00 << 6  /* clock polarity    : data captured on first 
clock transition */
+#define SSP_CPHA  0x00 << 7  /* clock phase       : SCK idles low             
*/
+#define SSP_SCR   0x0F << 8  /* serial clock rate : divide by 16              
*/
+
+/* SSPCR1 settings */
+#define SSP_LBM   0x00 << 0  /* loopback mode     : disabled                  
*/
+#define SSP_SSE   0x00 << 1  /* SSP enable        : disabled                  
*/
+#define SSP_MS    0x00 << 2  /* master slave mode : master                    
*/
+#define SSP_SOD   0x00 << 3  /* slave output disable : don't care when master 
*/
+
+#define SSPCR0_VAL8  (SSP_DDS8  |  SSP_FRF | SSP_CPOL | SSP_CPHA | SSP_SCR )
+#define SSPCR0_VAL16 (SSP_DDS16 |  SSP_FRF | SSP_CPOL | SSP_CPHA | SSP_SCR )
+#define SSPCR1_VAL   (SSP_LBM   |  SSP_SSE | SSP_MS   | SSP_SOD )
+
+#define SSP_PINSEL1_SCK  (2<<2)
+#define SSP_PINSEL1_MISO (2<<4)
+#define SSP_PINSEL1_MOSI (2<<6)
+
+
+#define ImuSetSSP8bits() { \
+    SSPCR0 = SSPCR0_VAL8;      \
+}
+
+#define ImuSetSSP16bits() { \
+    SSPCR0 = SSPCR0_VAL16;     \
+}
+
+
+void imu_b2_arch_init(void) {
+
+  imu_ssp_status = IMU_SSP_STA_IDLE;
+
+  /* setup pins for SSP (SCK, MISO, MOSI) */
+  PINSEL1 |= SSP_PINSEL1_SCK  | SSP_PINSEL1_MISO | SSP_PINSEL1_MOSI;
+
+  /* setup SSP */
+  SSPCR0 = SSPCR0_VAL16;
+  SSPCR1 = SSPCR1_VAL;
+  SSPCPSR = 0x02;
+
+  /* initialize interrupt vector */
+  VICIntSelect &= ~VIC_BIT( VIC_SPI1 );             /* SPI1 selected as IRQ */
+  VICIntEnable = VIC_BIT( VIC_SPI1 );               /* enable it            */
+  _VIC_CNTL(SSP_VIC_SLOT) = VIC_ENABLE | VIC_SPI1;
+  _VIC_ADDR(SSP_VIC_SLOT) = (uint32_t)SSP_ISR;      /* address of the ISR   */
+
+}
+
+
+void imu_periodic(void) {
+  // check ssp idle
+  // ASSERT((imu_status == IMU_STA_IDLE), DEBUG_IMU, IMU_ERR_OVERUN);
+
+  // setup 16 bits
+  ImuSetSSP16bits();
+  // read adc
+  imu_ssp_status = IMU_SSP_STA_BUSY_MAX1168;
+  max1168_read();
+#if defined IMU_B2_MAG_TYPE && IMU_B2_MAG_TYPE == IMU_B2_MAG_AMI601
+  RunOnceEvery(10, { ami601_read(); });
+#endif
+
+}
+
+
+
+#include "led.h"
+
+#if 0
+
+
+static inline bool_t isr_try_mag(void) {
+  switch (micromag_status) {
+  case MS2001_IDLE :
+    ImuSetSSP8bits();
+    Ms2001SendReq();
+    return TRUE;
+  case MS2001_GOT_EOC:
+    ImuSetSSP8bits();
+    Ms2001ReadRes();
+    return TRUE;
+  }
+  return FALSE;
+}
+
+static void SSP_ISR(void) {
+ ISR_ENTRY();
+
+ switch (imu_ssp_status) {
+ case IMU_SSP_STA_BUSY_MAX1168:
+   Max1168OnSpiInt();
+   if (isr_try_mag())
+     imu_ssp_status = IMU_SSP_STA_BUSY_MS2100;
+   else
+     imu_ssp_status = IMU_SSP_STA_IDLE;
+   break;
+ case IMU_SSP_STA_BUSY_MS2100:
+   Ms2001OnSpiIt();
+   imu_ssp_status = IMU_SSP_STA_IDLE;
+   break;
+ default:
+   // spurious interrupt
+   LED_ON(1);
+ }
+
+ VICVectAddr = 0x00000000; /* clear this interrupt from the VIC */
+ ISR_EXIT();
+}
+#endif
+
+
+static void SSP_ISR(void) {
+ ISR_ENTRY();
+
+ switch (imu_ssp_status) {
+ case IMU_SSP_STA_BUSY_MAX1168:
+   Max1168OnSpiInt();
+#if defined IMU_B2_MAG_TYPE && IMU_B2_MAG_TYPE == IMU_B2_MAG_MS2001
+  if (ms2001_status == MS2001_IDLE || ms2001_status == MS2001_GOT_EOC) {
+     ImuSetSSP8bits();
+     if (ms2001_status == MS2001_IDLE) {
+       Ms2001SendReq();
+     }
+     else { /* MS2001_GOT_EOC */
+       Ms2001ReadRes();
+     }
+     imu_ssp_status = IMU_SSP_STA_BUSY_MS2100;
+   }
+   else {
+#endif
+     imu_ssp_status = IMU_SSP_STA_IDLE;
+#if defined IMU_B2_MAG_TYPE && IMU_B2_MAG_TYPE == IMU_B2_MAG_MS2001
+   }
+#endif
+  break;
+#if defined IMU_B2_MAG_TYPE && IMU_B2_MAG_TYPE == IMU_B2_MAG_MS2001
+ case IMU_SSP_STA_BUSY_MS2100:
+   Ms2001OnSpiIt();
+   if (ms2001_status == MS2001_IDLE) {
+    Ms2001SendReq();
+    imu_ssp_status = IMU_SSP_STA_BUSY_MS2100;
+   }
+   else
+     imu_ssp_status = IMU_SSP_STA_IDLE;
+   break;
+#endif
+   // default:
+   // spurious interrupt
+   // FIXME LED_ON(1);
+ }
+
+ VICVectAddr = 0x00000000; /* clear this interrupt from the VIC */
+ ISR_EXIT();
+}

Copied: paparazzi3/trunk/sw/airborne/arch/lpc21/subsystems/imu/imu_b2_arch.h 
(from rev 6289, 
paparazzi3/trunk/sw/airborne/subsystems/imu/arch/lpc21/imu_b2_arch.h)
===================================================================
--- paparazzi3/trunk/sw/airborne/arch/lpc21/subsystems/imu/imu_b2_arch.h        
                        (rev 0)
+++ paparazzi3/trunk/sw/airborne/arch/lpc21/subsystems/imu/imu_b2_arch.h        
2010-10-27 23:40:58 UTC (rev 6290)
@@ -0,0 +1,52 @@
+/*
+ * $Id$
+ *
+ * Copyright (C) 2008-2009 Antoine Drouin <address@hidden>
+ *
+ * This file is part of paparazzi.
+ *
+ * paparazzi is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2, or (at your option)
+ * any later version.
+ *
+ * paparazzi is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with paparazzi; see the file COPYING.  If not, write to
+ * the Free Software Foundation, 59 Temple Place - Suite 330,
+ * Boston, MA 02111-1307, USA.
+ */
+
+#ifndef IMU_B2_ARCH_H
+#define IMU_B2_ARCH_H
+
+/*
+
+  MAX1168 SPI ADC connected on SPI1
+  SS on P0.20
+  EOC on P0.16 ( EINT0 )
+
+  PNI mag on same bus
+  SS on p1.28
+  EOC P0.30 ( EINT3 )
+  RESET P1.19
+
+*/
+
+#include "std.h"
+#include "LPC21xx.h"
+#include "interrupt_hw.h"
+
+#define IMU_SSP_STA_IDLE           0
+#define IMU_SSP_STA_BUSY_MAX1168   1
+#define IMU_SSP_STA_BUSY_MS2100    2
+extern volatile uint8_t imu_ssp_status;
+
+
+
+
+#endif /* IMU_B2_ARCH_H */

Copied: 
paparazzi3/trunk/sw/airborne/arch/lpc21/subsystems/imu/imu_crista_arch.c (from 
rev 6289, 
paparazzi3/trunk/sw/airborne/subsystems/imu/arch/lpc21/imu_crista_arch.c)
===================================================================
--- paparazzi3/trunk/sw/airborne/arch/lpc21/subsystems/imu/imu_crista_arch.c    
                        (rev 0)
+++ paparazzi3/trunk/sw/airborne/arch/lpc21/subsystems/imu/imu_crista_arch.c    
2010-10-27 23:40:58 UTC (rev 6290)
@@ -0,0 +1,123 @@
+/*
+ * $Id$
+ *
+ * Copyright (C) 2008-2009 Antoine Drouin <address@hidden>
+ *
+ * This file is part of paparazzi.
+ *
+ * paparazzi is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2, or (at your option)
+ * any later version.
+ *
+ * paparazzi is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with paparazzi; see the file COPYING.  If not, write to
+ * the Free Software Foundation, 59 Temple Place - Suite 330,
+ * Boston, MA 02111-1307, USA.
+ */
+
+#include "subsystems/imu.h"
+
+#include "LPC21xx.h"
+#include "armVIC.h"
+#include "ssp_hw.h"
+#include BOARD_CONFIG
+
+#define ADS8344_SS_IODIR IO0DIR
+#define ADS8344_SS_IOSET IO0SET
+#define ADS8344_SS_IOCLR IO0CLR
+#define ADS8344_SS_PIN   20
+
+#define ADS8344Select()   SetBit(ADS8344_SS_IOCLR,ADS8344_SS_PIN)
+#define ADS8344Unselect() SetBit(ADS8344_SS_IOSET,ADS8344_SS_PIN)
+
+#define POWER_MODE (1 << 1 | 1)
+#define SGL_DIF 1 // Single ended
+
+/* SSPCR0 settings */
+#define SSP_DSS  0x07 << 0  /* data size            : 8 bits   */
+#define SSP_FRF  0x00 << 4  /* frame format         : SPI      */
+#define SSP_CPOL 0x00 << 6  /* clock polarity       : idle low */
+#define SSP_CPHA 0x00 << 7  /* clock phase          : 1        */
+#define SSP_SCR  0x09 << 8  /* serial clock rate    : 1MHz     */
+
+/* SSPCR1 settings */
+#define SSP_LBM  0x00 << 0  /* loopback mode        : disabled */
+#define SSP_SSE  0x00 << 1  /* SSP enable           : disabled */
+#define SSP_MS   0x00 << 2  /* master slave mode    : master   */
+#define SSP_SOD  0x00 << 3  /* slave output disable : disabled */
+
+static void SPI1_ISR(void) __attribute__((naked));
+static uint8_t channel;
+
+void imu_crista_arch_init(void) {
+  channel = 0;
+
+  /* setup pins for SSP (SCK, MISO, MOSI) */
+  PINSEL1 |= 2 << 2 | 2 << 4 | 2 << 6;
+
+  /* setup SSP */
+  SSPCR0 = SSP_DSS | SSP_FRF | SSP_CPOL | SSP_CPHA | SSP_SCR;
+  SSPCR1 = SSP_LBM | SSP_MS | SSP_SOD;
+  SSPCPSR = 2; /* -> 50kHz */
+
+  /* initialize interrupt vector */
+  VICIntSelect &= ~VIC_BIT(VIC_SPI1);   // SPI1 selected as IRQ
+  VICIntEnable = VIC_BIT(VIC_SPI1);     // SPI1 interrupt enabled
+  VICVectCntl7 = VIC_ENABLE | VIC_SPI1;
+  VICVectAddr7 = (uint32_t)SPI1_ISR;    // address of the ISR
+
+  /* setup slave select */
+  /* configure SS pin */
+  SetBit( ADS8344_SS_IODIR,  ADS8344_SS_PIN);  /* pin is output  */
+  ADS8344Unselect();                           /* pin low        */
+}
+
+
+static inline void read_values( void ) {
+  uint8_t foo __attribute__ ((unused)) = SSPDR;
+  uint8_t msb = SSPDR;
+  uint8_t lsb = SSPDR;
+  uint8_t llsb = SSPDR;
+  ADS8344_values[channel] = (msb << 8 | lsb) << 1 | llsb >> 7;
+}
+
+static inline void send_request( void ) {
+  uint8_t control = 1 << 7 | channel << 4 | SGL_DIF << 2 | POWER_MODE;
+  SSP_Send(control);
+  SSP_Send(0);
+  SSP_Send(0);
+  SSP_Send(0);
+}
+
+void ADS8344_start( void ) {
+  ADS8344Select();
+  SSP_ClearRti();
+  SSP_EnableRti();
+  SSP_Enable();
+  send_request();
+}
+
+void SPI1_ISR(void) {
+ ISR_ENTRY();
+ read_values();
+ channel++;
+ if (channel > 7-1) {
+   channel = 0;
+   ADS8344_available = TRUE;
+   ADS8344Unselect();
+ }
+ else {
+   send_request();
+ }
+
+ SSP_ClearRti();
+
+ VICVectAddr = 0x00000000; /* clear this interrupt from the VIC */
+ ISR_EXIT();
+}

Copied: 
paparazzi3/trunk/sw/airborne/arch/lpc21/subsystems/imu/imu_crista_arch.h (from 
rev 6289, 
paparazzi3/trunk/sw/airborne/subsystems/imu/arch/lpc21/imu_crista_arch.h)
===================================================================
--- paparazzi3/trunk/sw/airborne/arch/lpc21/subsystems/imu/imu_crista_arch.h    
                        (rev 0)
+++ paparazzi3/trunk/sw/airborne/arch/lpc21/subsystems/imu/imu_crista_arch.h    
2010-10-27 23:40:58 UTC (rev 6290)
@@ -0,0 +1,37 @@
+/*
+ * $Id$
+ *
+ * Copyright (C) 2008-2009 Antoine Drouin <address@hidden>
+ *
+ * This file is part of paparazzi.
+ *
+ * paparazzi is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2, or (at your option)
+ * any later version.
+ *
+ * paparazzi is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with paparazzi; see the file COPYING.  If not, write to
+ * the Free Software Foundation, 59 Temple Place - Suite 330,
+ * Boston, MA 02111-1307, USA.
+ */
+
+#ifndef IMU_INT_HW_H
+#define IMU_INT_HW_H
+
+#include "std.h"
+
+
+
+#define ImuCristaArchPeriodic() {              \
+    ADS8344_start();                           \
+  }
+
+extern void ADS8344_start( void );
+
+#endif /* IMU_INT_HW_H */

Copied: paparazzi3/trunk/sw/airborne/arch/sim/subsystems/imu/imu_b2_arch.c 
(from rev 6289, 
paparazzi3/trunk/sw/airborne/subsystems/imu/arch/sim/imu_b2_arch.c)
===================================================================
--- paparazzi3/trunk/sw/airborne/arch/sim/subsystems/imu/imu_b2_arch.c          
                (rev 0)
+++ paparazzi3/trunk/sw/airborne/arch/sim/subsystems/imu/imu_b2_arch.c  
2010-10-27 23:40:58 UTC (rev 6290)
@@ -0,0 +1,61 @@
+/*
+ * $Id$
+ *
+ * Copyright (C) 2008-2009 Antoine Drouin <address@hidden>
+ *
+ * This file is part of paparazzi.
+ *
+ * paparazzi is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2, or (at your option)
+ * any later version.
+ *
+ * paparazzi is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with paparazzi; see the file COPYING.  If not, write to
+ * the Free Software Foundation, 59 Temple Place - Suite 330,
+ * Boston, MA 02111-1307, USA.
+ */
+
+#include "subsystems/imu.h"
+
+#include "airframe.h"
+
+void imu_b2_arch_init(void) {
+
+}
+
+void imu_periodic(void) {
+
+}
+
+#include "nps_sensors.h"
+
+void imu_feed_gyro_accel(void) {
+  max1168_values[IMU_GYRO_P_CHAN]  = sensors.gyro.value.x;
+  max1168_values[IMU_GYRO_Q_CHAN]  = sensors.gyro.value.y;
+  max1168_values[IMU_GYRO_R_CHAN]  = sensors.gyro.value.z;
+  max1168_values[IMU_ACCEL_X_CHAN] = sensors.accel.value.x;
+  max1168_values[IMU_ACCEL_Y_CHAN] = sensors.accel.value.y;
+  max1168_values[IMU_ACCEL_Z_CHAN] = sensors.accel.value.z;
+  max1168_status = STA_MAX1168_DATA_AVAILABLE;
+}
+
+
+void imu_feed_mag(void) {
+#if defined IMU_B2_MAG_TYPE && IMU_B2_MAG_TYPE == IMU_B2_MAG_MS2001
+  ms2001_values[IMU_MAG_X_CHAN] = sensors.mag.value.x;
+  ms2001_values[IMU_MAG_Y_CHAN] = sensors.mag.value.y;
+  ms2001_values[IMU_MAG_Z_CHAN] = sensors.mag.value.z;
+  ms2001_status = MS2001_DATA_AVAILABLE;
+#elif defined IMU_B2_MAG_TYPE && IMU_B2_MAG_TYPE == IMU_B2_MAG_AMI601
+  ami601_values[IMU_MAG_X_CHAN] = sensors.mag.value.x;
+  ami601_values[IMU_MAG_Y_CHAN] = sensors.mag.value.y;
+  ami601_values[IMU_MAG_Z_CHAN] = sensors.mag.value.z;
+  ami601_status = AMI601_DATA_AVAILABLE;
+#endif
+}

Copied: paparazzi3/trunk/sw/airborne/arch/sim/subsystems/imu/imu_b2_arch.h 
(from rev 6289, 
paparazzi3/trunk/sw/airborne/subsystems/imu/arch/sim/imu_b2_arch.h)
===================================================================
--- paparazzi3/trunk/sw/airborne/arch/sim/subsystems/imu/imu_b2_arch.h          
                (rev 0)
+++ paparazzi3/trunk/sw/airborne/arch/sim/subsystems/imu/imu_b2_arch.h  
2010-10-27 23:40:58 UTC (rev 6290)
@@ -0,0 +1,37 @@
+/*
+ * $Id$
+ *
+ * Copyright (C) 2008-2009 Antoine Drouin <address@hidden>
+ *
+ * This file is part of paparazzi.
+ *
+ * paparazzi is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2, or (at your option)
+ * any later version.
+ *
+ * paparazzi is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with paparazzi; see the file COPYING.  If not, write to
+ * the Free Software Foundation, 59 Temple Place - Suite 330,
+ * Boston, MA 02111-1307, USA.
+ */
+
+/*
+ *
+ * simulator plug for the booz2 v1 imu arch dependant functions
+ *
+ */
+#ifndef IMU_B2_ARCH_H
+#define IMU_B2_ARCH_H
+
+
+extern void imu_feed_gyro_accel(void);
+extern void imu_feed_mag(void);
+
+
+#endif /* IMU_B2_HW_H */

Copied: paparazzi3/trunk/sw/airborne/arch/sim/subsystems/imu/imu_crista_arch.c 
(from rev 6289, 
paparazzi3/trunk/sw/airborne/subsystems/imu/arch/sim/imu_crista_arch.c)
===================================================================
--- paparazzi3/trunk/sw/airborne/arch/sim/subsystems/imu/imu_crista_arch.c      
                        (rev 0)
+++ paparazzi3/trunk/sw/airborne/arch/sim/subsystems/imu/imu_crista_arch.c      
2010-10-27 23:40:58 UTC (rev 6290)
@@ -0,0 +1,31 @@
+/*
+ * simulator ARCH for rotorcraft imu crista
+ */
+
+#include "subsystems/imu.h"
+
+#include "airframe.h"
+
+void imu_crista_arch_init(void) {
+
+}
+
+
+#include "nps_sensors.h"
+
+void imu_feed_gyro_accel(void) {
+  ADS8344_values[IMU_GYRO_P_CHAN]  = sensors.gyro.value.x;
+  ADS8344_values[IMU_GYRO_Q_CHAN]  = sensors.gyro.value.y;
+  ADS8344_values[IMU_GYRO_R_CHAN]  = sensors.gyro.value.z;
+  ADS8344_values[IMU_ACCEL_X_CHAN] = sensors.accel.value.x;
+  ADS8344_values[IMU_ACCEL_Y_CHAN] = sensors.accel.value.y;
+  ADS8344_values[IMU_ACCEL_Z_CHAN] = sensors.accel.value.z;
+  ADS8344_available = TRUE;
+}
+
+void imu_feed_mag(void) {
+  ami601_values[IMU_MAG_X_CHAN] = sensors.mag.value.x;
+  ami601_values[IMU_MAG_Y_CHAN] = sensors.mag.value.y;
+  ami601_values[IMU_MAG_Z_CHAN] = sensors.mag.value.z;
+  ami601_status = AMI601_DATA_AVAILABLE;
+}

Copied: paparazzi3/trunk/sw/airborne/arch/sim/subsystems/imu/imu_crista_arch.h 
(from rev 6289, 
paparazzi3/trunk/sw/airborne/subsystems/imu/arch/sim/imu_crista_arch.h)
===================================================================
--- paparazzi3/trunk/sw/airborne/arch/sim/subsystems/imu/imu_crista_arch.h      
                        (rev 0)
+++ paparazzi3/trunk/sw/airborne/arch/sim/subsystems/imu/imu_crista_arch.h      
2010-10-27 23:40:58 UTC (rev 6290)
@@ -0,0 +1,41 @@
+/*
+ * $Id$
+ *
+ * Copyright (C) 2010 The Paparazzi Team
+ *
+ * This file is part of paparazzi.
+ *
+ * paparazzi is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2, or (at your option)
+ * any later version.
+ *
+ * paparazzi is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with paparazzi; see the file COPYING.  If not, write to
+ * the Free Software Foundation, 59 Temple Place - Suite 330,
+ * Boston, MA 02111-1307, USA.
+ */
+
+/*
+ *
+ * simulator plug for the crista imu arch dependant functions
+ *
+ */
+#ifndef IMU_CRISTA_ARCH_H
+#define IMU_CRISTA_ARCH_H
+
+#include "subsystems/imu.h"
+
+
+#define ImuCristaArchPeriodic() {}
+
+extern void imu_feed_gyro_accel(void);
+extern void imu_feed_mag(void);
+
+
+#endif /* IMU_CRISTA_HW_H */

Copied: 
paparazzi3/trunk/sw/airborne/arch/stm32/subsystems/imu/imu_aspirin_arch.c (from 
rev 6289, 
paparazzi3/trunk/sw/airborne/subsystems/imu/arch/stm32/imu_aspirin_arch.c)
===================================================================
--- paparazzi3/trunk/sw/airborne/arch/stm32/subsystems/imu/imu_aspirin_arch.c   
                        (rev 0)
+++ paparazzi3/trunk/sw/airborne/arch/stm32/subsystems/imu/imu_aspirin_arch.c   
2010-10-27 23:40:58 UTC (rev 6290)
@@ -0,0 +1,294 @@
+#include "subsystems/imu.h"
+
+#include <stm32/gpio.h>
+#include <stm32/misc.h>
+#include <stm32/rcc.h>
+#include <stm32/exti.h>
+#include <stm32/spi.h>
+#include <stm32/dma.h>
+
+#include "i2c.h"
+
+/* gyro int handler */
+void exti15_10_irq_handler(void);
+/* mag int handler  */
+void exti9_5_irq_handler(void);
+/* accelerometer int handler  */
+void exti2_irq_handler(void);
+/* accelerometer SPI selection */
+#define Adxl345Unselect() GPIOB->BSRR = GPIO_Pin_12
+#define Adxl345Select()   GPIOB->BRR = GPIO_Pin_12
+/* accelerometer dma end of rx handler */
+void dma1_c4_irq_handler(void);
+
+void imu_aspirin_arch_init(void) {
+
+  GPIO_InitTypeDef GPIO_InitStructure;
+  EXTI_InitTypeDef EXTI_InitStructure;
+  NVIC_InitTypeDef NVIC_InitStructure;
+  SPI_InitTypeDef SPI_InitStructure;
+
+  /* Set "mag ss" and "mag reset" as floating inputs ------------------------*/
+  /* "mag ss"    (PC12) is shorted to I2C2 SDA       */
+  /* "mag reset" (PC13) is shorted to I2C2 SCL       */
+  RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOC, ENABLE);
+  GPIO_InitStructure.GPIO_Pin = GPIO_Pin_12|GPIO_Pin_13;
+  GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING;
+  GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
+  GPIO_Init(GPIOC, &GPIO_InitStructure);
+
+  /* Gyro 
--------------------------------------------------------------------*/
+  /* set "eeprom ss" as floating input (on PC14) = gyro int          
---------*/
+  GPIO_InitStructure.GPIO_Pin = GPIO_Pin_14;
+  GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING;
+  GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
+  GPIO_Init(GPIOC, &GPIO_InitStructure);
+  /* configure external interrupt exti15_10 on PC14( gyro int ) */
+  RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOC | RCC_APB2Periph_AFIO, ENABLE);
+  GPIO_InitStructure.GPIO_Pin = GPIO_Pin_14;
+  GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING;
+  GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
+  GPIO_Init(GPIOC, &GPIO_InitStructure);
+
+  GPIO_EXTILineConfig(GPIO_PortSourceGPIOC, GPIO_PinSource14);
+  EXTI_InitStructure.EXTI_Line = EXTI_Line14;
+  EXTI_InitStructure.EXTI_Mode = EXTI_Mode_Interrupt;
+  EXTI_InitStructure.EXTI_Trigger = EXTI_Trigger_Falling;
+  EXTI_InitStructure.EXTI_LineCmd = ENABLE;
+  EXTI_Init(&EXTI_InitStructure);
+
+  NVIC_InitStructure.NVIC_IRQChannel = EXTI15_10_IRQn;
+  NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0x0F;
+  NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0x0F;
+  NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
+  NVIC_Init(&NVIC_InitStructure);
+
+
+  /* Accel */
+  /* set accel slave select as output and assert it ( on PB12) */
+  Adxl345Unselect();
+  RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOB, ENABLE);
+  GPIO_InitStructure.GPIO_Pin = GPIO_Pin_12;
+  GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_PP;
+  GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
+  GPIO_Init(GPIOB, &GPIO_InitStructure);
+
+  /* configure external interrupt exti2 on PD2( accel int ) */
+  RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOD | RCC_APB2Periph_AFIO, ENABLE);
+  GPIO_InitStructure.GPIO_Pin = GPIO_Pin_2;
+  GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING;
+  GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
+  GPIO_Init(GPIOD, &GPIO_InitStructure);
+  GPIO_EXTILineConfig(GPIO_PortSourceGPIOD, GPIO_PinSource2);
+
+  EXTI_InitStructure.EXTI_Line = EXTI_Line2;
+  EXTI_InitStructure.EXTI_Mode = EXTI_Mode_Interrupt;
+  EXTI_InitStructure.EXTI_Trigger = EXTI_Trigger_Falling;
+  EXTI_InitStructure.EXTI_LineCmd = ENABLE;
+  EXTI_Init(&EXTI_InitStructure);
+
+  NVIC_InitStructure.NVIC_IRQChannel = EXTI2_IRQn;
+  NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0x0F;
+  NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0x0F;
+  NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
+  NVIC_Init(&NVIC_InitStructure);
+
+  /* Enable SPI2 Periph clock 
-------------------------------------------------*/
+  RCC_APB1PeriphClockCmd(RCC_APB1Periph_SPI2, ENABLE);
+
+  /* Configure GPIOs: SCK, MISO and MOSI  --------------------------------*/
+  GPIO_InitStructure.GPIO_Pin = GPIO_Pin_13 | GPIO_Pin_14 | GPIO_Pin_15;
+  GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
+  GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
+  GPIO_Init(GPIOB, &GPIO_InitStructure);
+
+  RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOB | RCC_APB2Periph_AFIO , ENABLE);
+  SPI_Cmd(SPI2, ENABLE);
+
+  /* configure SPI */
+  SPI_InitStructure.SPI_Direction = SPI_Direction_2Lines_FullDuplex;
+  SPI_InitStructure.SPI_Mode = SPI_Mode_Master;
+  SPI_InitStructure.SPI_DataSize = SPI_DataSize_8b;
+  SPI_InitStructure.SPI_CPOL = SPI_CPOL_High;
+  SPI_InitStructure.SPI_CPHA = SPI_CPHA_2Edge;
+  SPI_InitStructure.SPI_NSS = SPI_NSS_Soft;
+  SPI_InitStructure.SPI_BaudRatePrescaler = SPI_BaudRatePrescaler_32;
+  SPI_InitStructure.SPI_FirstBit = SPI_FirstBit_MSB;
+  SPI_InitStructure.SPI_CRCPolynomial = 7;
+  SPI_Init(SPI2, &SPI_InitStructure);
+
+  /* Enable DMA1 channel4 IRQ Channel ( SPI RX) */
+  NVIC_InitTypeDef NVIC_init_struct = {
+    .NVIC_IRQChannel = DMA1_Channel4_IRQn,
+    .NVIC_IRQChannelPreemptionPriority = 0,
+    .NVIC_IRQChannelSubPriority = 0,
+    .NVIC_IRQChannelCmd = ENABLE
+  };
+  NVIC_Init(&NVIC_init_struct);
+
+  /* Enable SPI_2 DMA clock 
---------------------------------------------------*/
+  RCC_AHBPeriphClockCmd(RCC_AHBPeriph_DMA1, ENABLE);
+
+
+  /* Mag   */
+  /* configure external interrupt exti5 on PB5( mag int ) */
+  RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOB | RCC_APB2Periph_AFIO, ENABLE);
+  GPIO_InitStructure.GPIO_Pin = GPIO_Pin_5;
+  GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING;
+  GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
+  GPIO_Init(GPIOB, &GPIO_InitStructure);
+
+  GPIO_EXTILineConfig(GPIO_PortSourceGPIOB, GPIO_PinSource5);
+  EXTI_InitStructure.EXTI_Line = EXTI_Line5;
+  EXTI_InitStructure.EXTI_Mode = EXTI_Mode_Interrupt;
+  EXTI_InitStructure.EXTI_Trigger = EXTI_Trigger_Falling;
+  EXTI_InitStructure.EXTI_LineCmd = ENABLE;
+  EXTI_Init(&EXTI_InitStructure);
+
+  NVIC_InitStructure.NVIC_IRQChannel = EXTI9_5_IRQn;
+  NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0x0F;
+  NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0x0F;
+  NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
+  NVIC_Init(&NVIC_InitStructure);
+
+}
+
+
+void adxl345_write_to_reg(uint8_t addr, uint8_t val) {
+
+  Adxl345Select();
+  SPI_I2S_SendData(SPI2, addr);
+  while (SPI_I2S_GetFlagStatus(SPI2, SPI_I2S_FLAG_TXE) == RESET);
+  SPI_I2S_SendData(SPI2, val);
+  while (SPI_I2S_GetFlagStatus(SPI2, SPI_I2S_FLAG_TXE) == RESET);
+  while (SPI_I2S_GetFlagStatus(SPI2, SPI_I2S_FLAG_BSY) == SET);
+  Adxl345Unselect();
+
+}
+
+void adxl345_clear_rx_buf(void) {
+  uint8_t __attribute__ ((unused)) ret = SPI_I2S_ReceiveData(SPI2);
+}
+
+void adxl345_start_reading_data(void) {
+   Adxl345Select();
+
+   imu_aspirin.accel_tx_buf[0] = (1<<7|1<<6|ADXL345_REG_DATA_X0);
+
+  /* SPI2_Rx_DMA_Channel configuration ------------------------------------*/
+  DMA_DeInit(DMA1_Channel4);
+  DMA_InitTypeDef DMA_initStructure_4 = {
+    .DMA_PeripheralBaseAddr = (uint32_t)(SPI2_BASE+0x0C),
+    .DMA_MemoryBaseAddr = (uint32_t)imu_aspirin.accel_rx_buf,
+    .DMA_DIR = DMA_DIR_PeripheralSRC,
+    .DMA_BufferSize = 7,
+    .DMA_PeripheralInc = DMA_PeripheralInc_Disable,
+    .DMA_MemoryInc = DMA_MemoryInc_Enable,
+    .DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte,
+    .DMA_MemoryDataSize = DMA_MemoryDataSize_Byte,
+    .DMA_Mode = DMA_Mode_Normal,
+    .DMA_Priority = DMA_Priority_VeryHigh,
+    .DMA_M2M = DMA_M2M_Disable
+  };
+  DMA_Init(DMA1_Channel4, &DMA_initStructure_4);
+
+  /* SPI2_Tx_DMA_Channel configuration ------------------------------------*/
+  DMA_DeInit(DMA1_Channel5);
+  DMA_InitTypeDef DMA_initStructure_5 = {
+    .DMA_PeripheralBaseAddr = (uint32_t)(SPI2_BASE+0x0C),
+    .DMA_MemoryBaseAddr = (uint32_t)imu_aspirin.accel_tx_buf,
+    .DMA_DIR = DMA_DIR_PeripheralDST,
+    .DMA_BufferSize = 7,
+    .DMA_PeripheralInc = DMA_PeripheralInc_Disable,
+    .DMA_MemoryInc = DMA_MemoryInc_Enable,
+    .DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte,
+    .DMA_MemoryDataSize = DMA_MemoryDataSize_Byte,
+    .DMA_Mode = DMA_Mode_Normal,
+    .DMA_Priority = DMA_Priority_Medium,
+    .DMA_M2M = DMA_M2M_Disable
+  };
+  DMA_Init(DMA1_Channel5, &DMA_initStructure_5);
+
+  /* Enable SPI_2 Rx request */
+  SPI_I2S_DMACmd(SPI2, SPI_I2S_DMAReq_Rx, ENABLE);
+  /* Enable DMA1 Channel4 */
+  DMA_Cmd(DMA1_Channel4, ENABLE);
+
+  /* Enable SPI_2 Tx request */
+  SPI_I2S_DMACmd(SPI2, SPI_I2S_DMAReq_Tx, ENABLE);
+  /* Enable DMA1 Channel5 */
+  DMA_Cmd(DMA1_Channel5, ENABLE);
+
+  /* Enable DMA1 Channel4 Transfer Complete interrupt */
+  DMA_ITConfig(DMA1_Channel4, DMA_IT_TC, ENABLE);
+}
+
+/*
+ *
+ * Gyro data ready
+ *
+ */
+void exti15_10_irq_handler(void) {
+
+  /* clear EXTI */
+  if(EXTI_GetITStatus(EXTI_Line14) != RESET)
+    EXTI_ClearITPendingBit(EXTI_Line14);
+
+  imu_aspirin.i2c_trans_gyro.type = I2CTransTxRx;
+  imu_aspirin.i2c_trans_gyro.buf[0] = ITG3200_REG_GYRO_XOUT_H;
+  imu_aspirin.i2c_trans_gyro.slave_addr = ITG3200_ADDR;
+  imu_aspirin.i2c_trans_gyro.len_w = 1;
+  imu_aspirin.i2c_trans_gyro.len_r = 6;
+  //  if (!i2c_submit(&i2c2,&imu_aspirin.i2c_trans_gyro)) while(1);
+  i2c_submit(&i2c2,&imu_aspirin.i2c_trans_gyro);
+  imu_aspirin.status = AspirinStatusReadingGyro;
+
+}
+
+/*
+ *
+ * Mag data ready
+ *
+ */
+void exti9_5_irq_handler(void) {
+
+  /* clear EXTI */
+  if(EXTI_GetITStatus(EXTI_Line5) != RESET)
+    EXTI_ClearITPendingBit(EXTI_Line5);
+
+  imu_aspirin.mag_ready_for_read = TRUE;
+
+}
+
+/*
+ *
+ * Accel data ready
+ *
+ */
+void exti2_irq_handler(void) {
+
+  /* clear EXTI */
+  if(EXTI_GetITStatus(EXTI_Line2) != RESET)
+    EXTI_ClearITPendingBit(EXTI_Line2);
+
+  adxl345_start_reading_data();
+
+}
+
+/*
+ *
+ * Accel end of DMA transfert
+ *
+ */
+void dma1_c4_irq_handler(void) {
+  Adxl345Unselect();
+  DMA_ITConfig(DMA1_Channel4, DMA_IT_TC, DISABLE);
+  /* Disable SPI_2 Rx and TX request */
+  SPI_I2S_DMACmd(SPI2, SPI_I2S_DMAReq_Rx, DISABLE);
+  SPI_I2S_DMACmd(SPI2, SPI_I2S_DMAReq_Tx, DISABLE);
+  /* Disable DMA1 Channel4 and 5 */
+  DMA_Cmd(DMA1_Channel4, DISABLE);
+  DMA_Cmd(DMA1_Channel5, DISABLE);
+
+  imu_aspirin.accel_available = TRUE;
+}

Copied: 
paparazzi3/trunk/sw/airborne/arch/stm32/subsystems/imu/imu_aspirin_arch.h (from 
rev 6289, 
paparazzi3/trunk/sw/airborne/subsystems/imu/arch/stm32/imu_aspirin_arch.h)
===================================================================
--- paparazzi3/trunk/sw/airborne/arch/stm32/subsystems/imu/imu_aspirin_arch.h   
                        (rev 0)
+++ paparazzi3/trunk/sw/airborne/arch/stm32/subsystems/imu/imu_aspirin_arch.h   
2010-10-27 23:40:58 UTC (rev 6290)
@@ -0,0 +1,14 @@
+#ifndef IMU_ASPIRIN_ARCH_H
+#define IMU_ASPIRIN_ARCH_H
+
+#include "subsystems/imu.h"
+
+#include "led.h"
+
+extern void imu_aspirin_arch_init(void);
+extern void adxl345_write_to_reg(uint8_t addr, uint8_t val);
+extern void adxl345_clear_rx_buf(void);
+extern void adxl345_start_reading_data(void);
+
+
+#endif /* IMU_ASPIRIN_ARCH_H */

Copied: paparazzi3/trunk/sw/airborne/arch/stm32/subsystems/imu/imu_b2_arch.c 
(from rev 6289, 
paparazzi3/trunk/sw/airborne/subsystems/imu/arch/stm32/imu_b2_arch.c)
===================================================================
--- paparazzi3/trunk/sw/airborne/arch/stm32/subsystems/imu/imu_b2_arch.c        
                        (rev 0)
+++ paparazzi3/trunk/sw/airborne/arch/stm32/subsystems/imu/imu_b2_arch.c        
2010-10-27 23:40:58 UTC (rev 6290)
@@ -0,0 +1,123 @@
+/*
+ * $Id$
+ *
+ * Copyright (C) 20010 Antoine Drouin <address@hidden>
+ *
+ * This file is part of Paparazzi.
+ *
+ * Paparazzi is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2, or (at your option)
+ * any later version.
+ *
+ * Paparazzi is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with Paparazzi; see the file COPYING.  If not, write to
+ * the Free Software Foundation, 59 Temple Place - Suite 330,
+ * Boston, MA 02111-1307, USA.
+ */
+
+#include "subsystems/imu.h"
+
+#include <stm32/gpio.h>
+#include <stm32/rcc.h>
+#include <stm32/spi.h>
+#include <stm32/exti.h>
+#include <stm32/misc.h>
+#include <stm32/dma.h>
+
+#define IMU_SSP_STA_IDLE           0
+#define IMU_SSP_STA_BUSY_MAX1168   1
+#define IMU_SSP_STA_BUSY_MS2100    2
+
+volatile uint8_t imu_ssp_status;
+
+void dma1_c4_irq_handler(void);
+void spi2_irq_handler(void);
+
+void imu_b2_arch_init(void) {
+
+  /* Enable SPI2 Periph clock 
-------------------------------------------------*/
+  RCC_APB1PeriphClockCmd(RCC_APB1Periph_SPI2, ENABLE);
+  /* Enable SPI_2 DMA clock 
---------------------------------------------------*/
+  RCC_AHBPeriphClockCmd(RCC_AHBPeriph_DMA1, ENABLE);
+  /* Enable PORTB GPIO clock 
--------------------------------------------------*/
+  RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOB | RCC_APB2Periph_AFIO , ENABLE);
+  /* Configure GPIOs: SCK, MISO and MOSI  
-------------------------------------*/
+  GPIO_InitTypeDef GPIO_InitStructure;
+  GPIO_InitStructure.GPIO_Pin = GPIO_Pin_13 | GPIO_Pin_14 | GPIO_Pin_15;
+  GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
+  GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
+  GPIO_Init(GPIOB, &GPIO_InitStructure);
+  /* Enable DMA1 channel4 IRQ Channel */
+  NVIC_InitTypeDef NVIC_init_struct = {
+    .NVIC_IRQChannel = DMA1_Channel4_IRQn,
+    .NVIC_IRQChannelPreemptionPriority = 0,
+    .NVIC_IRQChannelSubPriority = 0,
+    .NVIC_IRQChannelCmd = ENABLE
+  };
+  NVIC_Init(&NVIC_init_struct);
+  /* Enable SPI2 IRQ Channel */
+  NVIC_InitTypeDef NVIC_init_structure_spi = {
+    .NVIC_IRQChannel = SPI2_IRQn,
+    .NVIC_IRQChannelPreemptionPriority = 0,
+    .NVIC_IRQChannelSubPriority = 1,
+    .NVIC_IRQChannelCmd = ENABLE
+  };
+  NVIC_Init(&NVIC_init_structure_spi);
+
+  imu_ssp_status = IMU_SSP_STA_IDLE;
+}
+
+void imu_periodic(void) {
+  // check ssp idle
+  // ASSERT((imu_status == IMU_STA_IDLE), DEBUG_IMU, IMU_ERR_OVERUN);
+  imu_ssp_status = IMU_SSP_STA_BUSY_MAX1168;
+  Max1168ConfigureSPI();
+  SPI_Cmd(SPI2, ENABLE);
+  max1168_read();
+#if IMU_B2_MAG_TYPE == IMU_B2_MAG_HMC5843
+       hmc5843_periodic();
+#endif
+}
+
+/* used for spi2 */
+void dma1_c4_irq_handler(void) {
+  switch (imu_ssp_status) {
+  case IMU_SSP_STA_BUSY_MAX1168:
+    Max1168OnDmaIrq();
+    SPI_Cmd(SPI2, DISABLE);
+#if IMU_B2_MAG_TYPE == IMU_B2_MAG_MS2001
+    if (ms2001_status == MS2001_IDLE) {
+      Ms2001SendReq();
+      imu_ssp_status = IMU_SSP_STA_BUSY_MS2100;
+    }
+    else if (ms2001_status == MS2001_WAITING_EOC && Ms2001HasEOC()) {
+      Ms2001ReadRes();
+      imu_ssp_status = IMU_SSP_STA_BUSY_MS2100;
+    }
+    else
+#endif
+      imu_ssp_status = IMU_SSP_STA_IDLE;
+    break;
+  case IMU_SSP_STA_BUSY_MS2100:
+#if IMU_B2_MAG_TYPE == IMU_B2_MAG_MS2001
+    Ms2001OnDmaIrq();
+#endif
+    break;
+  default:
+    // POST_ERROR(DEBUG_IMU, IMU_ERR_SUPRIOUS_DMA1_C4_IRQ);
+    imu_ssp_status = IMU_SSP_STA_IDLE;
+  }
+}
+
+
+void spi2_irq_handler(void) {
+#if IMU_B2_MAG_TYPE == IMU_B2_MAG_MS2001
+  Ms2001OnSpiIrq();
+#endif
+}

Copied: paparazzi3/trunk/sw/airborne/arch/stm32/subsystems/imu/imu_b2_arch.h 
(from rev 6289, 
paparazzi3/trunk/sw/airborne/subsystems/imu/arch/stm32/imu_b2_arch.h)
===================================================================
--- paparazzi3/trunk/sw/airborne/arch/stm32/subsystems/imu/imu_b2_arch.h        
                        (rev 0)
+++ paparazzi3/trunk/sw/airborne/arch/stm32/subsystems/imu/imu_b2_arch.h        
2010-10-27 23:40:58 UTC (rev 6290)
@@ -0,0 +1,29 @@
+/*
+ * $Id: imu_b2_arch.h 3732 2009-07-20 17:46:54Z poine $
+ *
+ * Copyright (C) 2008-2009 Antoine Drouin <address@hidden>
+ *
+ * This file is part of paparazzi.
+ *
+ * paparazzi is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2, or (at your option)
+ * any later version.
+ *
+ * paparazzi is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with paparazzi; see the file COPYING.  If not, write to
+ * the Free Software Foundation, 59 Temple Place - Suite 330,
+ * Boston, MA 02111-1307, USA.
+ */
+
+#ifndef IMU_B2_ARCH_H
+#define IMU_B2_ARCH_H
+
+
+
+#endif /* IMU_B2_ARCH_H */

Copied: 
paparazzi3/trunk/sw/airborne/arch/stm32/subsystems/imu/imu_crista_arch.c (from 
rev 6289, 
paparazzi3/trunk/sw/airborne/subsystems/imu/arch/stm32/imu_crista_arch.c)
===================================================================
--- paparazzi3/trunk/sw/airborne/arch/stm32/subsystems/imu/imu_crista_arch.c    
                        (rev 0)
+++ paparazzi3/trunk/sw/airborne/arch/stm32/subsystems/imu/imu_crista_arch.c    
2010-10-27 23:40:58 UTC (rev 6290)
@@ -0,0 +1,176 @@
+/*
+ * $Id$
+ *
+ * Copyright (C) 2008-2009 Antoine Drouin <address@hidden>
+ *
+ * This file is part of paparazzi.
+ *
+ * paparazzi is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2, or (at your option)
+ * any later version.
+ *
+ * paparazzi is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with paparazzi; see the file COPYING.  If not, write to
+ * the Free Software Foundation, 59 Temple Place - Suite 330,
+ * Boston, MA 02111-1307, USA.
+ */
+
+#include "subsystems/imu.h"
+
+#include <stm32/gpio.h>
+#include <stm32/rcc.h>
+#include <stm32/spi.h>
+#include <stm32/misc.h>
+#include <stm32/dma.h>
+
+#include "stm32_vector_table.h"
+
+static volatile uint8_t channel;
+static uint8_t buf_in[4];
+static uint8_t buf_out[4];
+
+#define POWER_MODE (1 << 1 | 1)
+#define SGL_DIF 1 // Single ended
+
+#define ADS8344Unselect() GPIOB->BSRR = GPIO_Pin_12
+#define ADS8344Select()   GPIOB->BRR  = GPIO_Pin_12
+
+extern void dma1_c4_irq_handler(void);
+static void ADS8344_read_channel( void );
+
+void imu_crista_arch_init(void) {
+
+  channel = 0;
+  /* Enable SPI2 Periph clock 
-------------------------------------------------*/
+  RCC_APB1PeriphClockCmd(RCC_APB1Periph_SPI2, ENABLE);
+  /* Enable SPI_2 DMA clock 
---------------------------------------------------*/
+  RCC_AHBPeriphClockCmd(RCC_AHBPeriph_DMA1, ENABLE);
+  /* Enable PORTB GPIO clock 
--------------------------------------------------*/
+  RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOB | RCC_APB2Periph_AFIO , ENABLE);
+  /* Configure GPIOs: SCK, MISO and MOSI  
-------------------------------------*/
+  GPIO_InitTypeDef GPIO_InitStructure;
+  GPIO_InitStructure.GPIO_Pin = GPIO_Pin_13 | GPIO_Pin_14 | GPIO_Pin_15;
+  GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
+  GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
+  GPIO_Init(GPIOB, &GPIO_InitStructure);
+  /* set slave select as output and assert it ( on PB12) */
+  GPIO_InitStructure.GPIO_Pin = GPIO_Pin_12;
+  GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_PP;
+  GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
+  GPIO_Init(GPIOB, &GPIO_InitStructure);
+  ADS8344Unselect();
+  /* configure SPI after enabling it*/
+  SPI_Cmd(SPI2, ENABLE);
+  SPI_InitTypeDef SPI_InitStructure;
+  SPI_InitStructure.SPI_Direction = SPI_Direction_2Lines_FullDuplex;
+  SPI_InitStructure.SPI_Mode = SPI_Mode_Master;
+  SPI_InitStructure.SPI_DataSize = SPI_DataSize_8b;
+  SPI_InitStructure.SPI_CPOL = SPI_CPOL_Low;
+  SPI_InitStructure.SPI_CPHA = SPI_CPHA_1Edge;
+  SPI_InitStructure.SPI_NSS = SPI_NSS_Soft;
+  SPI_InitStructure.SPI_BaudRatePrescaler = SPI_BaudRatePrescaler_16;
+  SPI_InitStructure.SPI_FirstBit = SPI_FirstBit_MSB;
+  SPI_InitStructure.SPI_CRCPolynomial = 7;
+  SPI_Init(SPI2, &SPI_InitStructure);
+
+  /* Enable DMA1 channel4 IRQ Channel */
+  NVIC_InitTypeDef NVIC_init_struct = {
+    .NVIC_IRQChannel = DMA1_Channel4_IRQn,
+    .NVIC_IRQChannelPreemptionPriority = 0,
+    .NVIC_IRQChannelSubPriority = 0,
+    .NVIC_IRQChannelCmd = ENABLE
+  };
+  NVIC_Init(&NVIC_init_struct);
+
+}
+
+
+void ADS8344_start( void ) {
+
+  ADS8344Select();
+  channel = 0;
+  ADS8344_read_channel();
+
+}
+
+static void ADS8344_read_channel( void ) {
+
+  // control byte
+  buf_out[0] = 1 << 7 | channel << 4 | SGL_DIF << 2 | POWER_MODE;
+
+  /* trigger 4 bytes read */
+  /* SPI2_Rx_DMA_Channel configuration ------------------------------------*/
+  DMA_DeInit(DMA1_Channel4);
+  DMA_InitTypeDef DMA_initStructure_4 = {
+    .DMA_PeripheralBaseAddr = (uint32_t)(SPI2_BASE+0x0C),
+    .DMA_MemoryBaseAddr = (uint32_t)buf_in,
+    .DMA_DIR = DMA_DIR_PeripheralSRC,
+    .DMA_BufferSize = 4,
+    .DMA_PeripheralInc = DMA_PeripheralInc_Disable,
+    .DMA_MemoryInc = DMA_MemoryInc_Enable,
+    .DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte,
+    .DMA_MemoryDataSize = DMA_MemoryDataSize_Byte,
+    .DMA_Mode = DMA_Mode_Normal,
+    .DMA_Priority = DMA_Priority_VeryHigh,
+    .DMA_M2M = DMA_M2M_Disable
+  };
+  DMA_Init(DMA1_Channel4, &DMA_initStructure_4);
+
+  /* SPI2_Tx_DMA_Channel configuration ------------------------------------*/
+  DMA_DeInit(DMA1_Channel5);
+  DMA_InitTypeDef DMA_initStructure_5 = {
+    .DMA_PeripheralBaseAddr = (uint32_t)(SPI2_BASE+0x0C),
+    .DMA_MemoryBaseAddr = (uint32_t)buf_out,
+    .DMA_DIR = DMA_DIR_PeripheralDST,
+    .DMA_BufferSize = 4,
+    .DMA_PeripheralInc = DMA_PeripheralInc_Disable,
+    .DMA_MemoryInc = DMA_MemoryInc_Enable,
+    .DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte,
+    .DMA_MemoryDataSize = DMA_MemoryDataSize_Byte,
+    .DMA_Mode = DMA_Mode_Normal,
+    .DMA_Priority = DMA_Priority_Medium,
+    .DMA_M2M = DMA_M2M_Disable
+  };
+  DMA_Init(DMA1_Channel5, &DMA_initStructure_5);
+
+  /* Enable SPI_2 Rx request */
+  SPI_I2S_DMACmd(SPI2, SPI_I2S_DMAReq_Rx, ENABLE);
+  /* Enable DMA1 Channel4 */
+  DMA_Cmd(DMA1_Channel4, ENABLE);
+
+  /* Enable SPI_2 Tx request */
+  SPI_I2S_DMACmd(SPI2, SPI_I2S_DMAReq_Tx, ENABLE);
+  /* Enable DMA1 Channel5 */
+  DMA_Cmd(DMA1_Channel5, ENABLE);
+
+  /* Enable DMA1 Channel4 Transfer Complete interrupt */
+  DMA_ITConfig(DMA1_Channel4, DMA_IT_TC, ENABLE);
+
+}
+
+
+void dma1_c4_irq_handler(void) {
+
+  ADS8344_values[channel] = (buf_in[1] << 8 | buf_in[2]) << 1 | buf_in[3] >> 7;
+  channel++;
+  if (channel > 6) {
+    ADS8344_available = TRUE;
+    ADS8344Unselect();
+    DMA_ITConfig(DMA1_Channel4, DMA_IT_TC, DISABLE);
+    /* Disable SPI_2 Rx and TX request */
+    SPI_I2S_DMACmd(SPI2, SPI_I2S_DMAReq_Rx, DISABLE);
+    SPI_I2S_DMACmd(SPI2, SPI_I2S_DMAReq_Tx, DISABLE);
+    /* Disable DMA1 Channel4 and 5 */
+    DMA_Cmd(DMA1_Channel4, DISABLE);
+    DMA_Cmd(DMA1_Channel5, DISABLE);
+  }
+  else {
+    ADS8344_read_channel();
+  }
+}

Copied: 
paparazzi3/trunk/sw/airborne/arch/stm32/subsystems/imu/imu_crista_arch.h (from 
rev 6289, 
paparazzi3/trunk/sw/airborne/subsystems/imu/arch/stm32/imu_crista_arch.h)
===================================================================
--- paparazzi3/trunk/sw/airborne/arch/stm32/subsystems/imu/imu_crista_arch.h    
                        (rev 0)
+++ paparazzi3/trunk/sw/airborne/arch/stm32/subsystems/imu/imu_crista_arch.h    
2010-10-27 23:40:58 UTC (rev 6290)
@@ -0,0 +1,34 @@
+/*
+ * $Id$
+ *
+ * Copyright (C) 2010 Antoine Drouin <address@hidden>
+ *
+ * This file is part of paparazzi.
+ *
+ * paparazzi is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2, or (at your option)
+ * any later version.
+ *
+ * paparazzi is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with paparazzi; see the file COPYING.  If not, write to
+ * the Free Software Foundation, 59 Temple Place - Suite 330,
+ * Boston, MA 02111-1307, USA.
+ */
+#ifndef IMU_CRISTA_ARCH_H
+#define IMU_CRISTA_ARCH_H
+
+
+#define ImuCristaArchPeriodic() {              \
+    ADS8344_start();                           \
+  }
+
+extern void ADS8344_start( void );
+
+
+#endif /* IMU_CRISTA_ARCH_H */

Modified: paparazzi3/trunk/sw/airborne/subsystems/imu/imu_aspirin.h
===================================================================
--- paparazzi3/trunk/sw/airborne/subsystems/imu/imu_aspirin.h   2010-10-27 
23:40:48 UTC (rev 6289)
+++ paparazzi3/trunk/sw/airborne/subsystems/imu/imu_aspirin.h   2010-10-27 
23:40:58 UTC (rev 6290)
@@ -124,7 +124,7 @@
 
 
 /* underlying architecture */
-#include "imu_aspirin_arch.h"
+#include "subsystems/imu/imu_aspirin_arch.h"
 /* must be implemented by underlying architecture */
 extern void imu_b2_arch_init(void);
 

Modified: paparazzi3/trunk/sw/airborne/subsystems/imu/imu_b2.h
===================================================================
--- paparazzi3/trunk/sw/airborne/subsystems/imu/imu_b2.h        2010-10-27 
23:40:48 UTC (rev 6289)
+++ paparazzi3/trunk/sw/airborne/subsystems/imu/imu_b2.h        2010-10-27 
23:40:58 UTC (rev 6290)
@@ -200,7 +200,7 @@
 
 
 /* underlying architecture */
-#include "imu_b2_arch.h"
+#include "subsystems/imu/imu_b2_arch.h"
 /* must be implemented by underlying architecture */
 extern void imu_b2_arch_init(void);
 

Modified: paparazzi3/trunk/sw/airborne/subsystems/imu/imu_crista.h
===================================================================
--- paparazzi3/trunk/sw/airborne/subsystems/imu/imu_crista.h    2010-10-27 
23:40:48 UTC (rev 6289)
+++ paparazzi3/trunk/sw/airborne/subsystems/imu/imu_crista.h    2010-10-27 
23:40:58 UTC (rev 6290)
@@ -64,7 +64,7 @@
 #endif
 
 /* underlying architecture */
-#include "imu_crista_arch.h"
+#include "subsystems/imu/imu_crista_arch.h"
 /* must be defined by underlying architecture */
 extern void imu_crista_arch_init(void);
 

Modified: paparazzi3/trunk/sw/airborne/subsystems/imu.c
===================================================================
--- paparazzi3/trunk/sw/airborne/subsystems/imu.c       2010-10-27 23:40:48 UTC 
(rev 6289)
+++ paparazzi3/trunk/sw/airborne/subsystems/imu.c       2010-10-27 23:40:58 UTC 
(rev 6290)
@@ -21,7 +21,7 @@
  * Boston, MA 02111-1307, USA.
  */
 
-#include "imu.h"
+#include "subsystems/imu.h"
 
 #include "airframe.h"
 




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