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Re: [Pthreads-hackers] threadvar and non-fixed size stacks
From: |
Jeroen Dekkers |
Subject: |
Re: [Pthreads-hackers] threadvar and non-fixed size stacks |
Date: |
Wed, 30 Jan 2002 21:41:53 +0100 |
User-agent: |
Mutt/1.3.25i |
On Wed, Jan 30, 2002 at 09:31:01PM +0100, Johan Rydberg wrote:
>
> On 2002.01.30 21:11 Jeroen Dekkers wrote:
> : On Wed, Jan 30, 2002 at 06:21:06PM +0100, Johan Rydberg wrote:
>
> : We use a thread-specific register for that. On the ia32 architecture,
> : that means we use the segment register gs. When we are setting up the
> : stack, we load the register with the address of the TSD (Thread
> : Specific Data)(see sysdeps/mach/hurd/i386/init-first.c). Then
> : __hurd_threadvar_location() just uses %gs to calculate the
> : address (see hurd/hurd/threadvar.h). Note however that this
> : implementation is not totally finished yet and it's untested.
>
> What to do on host operating systems that do not permit that the
> user add or modify segments (in the ia32 case)?
Hack the host operating system so it supports modifying segments. :)
AFAIK Linux supports it, so does Mach (if you don't look at the
bugs). I personally don't care about other systems at the
moment. Maybe you could do some other hack, but as it isn't needed I
haven't thought about it.
> The code:
>
> __asm__ __volatile__ ("lea %%gs:(,%1,4),%0"
> :"=r" (var)
> :"r" (__index));
>
> Is this really valid code? I mean, does it really add the base offset
> of the segment? Hmm. Where the hell are my ia32 books!
AFAIK, yes. There is some section about AT&T vs. Intel syntax, also
describing this kind of things. Basically it is: The segment is the gs
segment, which is loaded with the TSD location. "%1" is __index, which
is the index specified, ",4" means multiplying it the __index by 4,
because an integer is 4 bytes. This is added to the %gs, you've got
the address of the TSD entry. Then this address is stored in %0, var,
which is returned.
Jeroen Dekkers
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