Re: [Qemu-arm] [Qemu-devel] [RFC v2 0/8] KVM PCI/MSI passthrough with mach-virt

[Yehuda Yitschak]

Tested-by: Yehuda Yitschak <address@hidden>

Tested on Armada-7040 using an intel IXGBE (82599ES). 


> -----Original Message-----
> From: address@hidden
> [mailto:address@hidden On
> Behalf Of Eric Auger
> Sent: Friday, January 29, 2016 18:54
> To: address@hidden; address@hidden; address@hidden;
> address@hidden; address@hidden;
> address@hidden; address@hidden;
> address@hidden; address@hidden; address@hidden
> Cc: address@hidden; address@hidden;
> address@hidden
> Subject: [Qemu-devel] [RFC v2 0/8] KVM PCI/MSI passthrough with mach-
> virt
> 
> This series enables KVM PCI/MSI passthrough with mach-virt.
> 
> A new memory region type is introduced (reserved iova). On
> vfio_listener_region_add this IOVA region is registered to the kernel with
> VFIO_IOMMU_MAP_DMA (using the new
> VFIO_DMA_MAP_FLAG_MSI_RESERVED_IOVA flag).
> 
> The host VFIO PCI driver then can use this IOVA window to map some host
> physical addresses, accessed by passthrough'ed PCI devices, through the
> IOMMU.
> The first goal is to map host MSI controller frames (GICv2M,
> GITS_TRANSLATER).
> 
> mach-virt currently instantiates a 16x64kB reserved IOVA window. This
> provisions for future usage. Most probably this exceeds MSI binding needs.
> To avoid wasting guest PA, we now map the reserved region onto the
> platform bus MMIO.
> 
> The series includes Pranav/Tushar' series:
> QEMU, [v2 0/2] Generic PCIe host bridge INTx determination for INTx routing
> ((https://lists.nongnu.org/archive/html/qemu-devel/2015-
> 04/msg04361.html))
> 
> Those patches are not mandated for PCI/MSI passthrough to work but
> without those, the following warning is observed and can puzzle the end-
> user:
> "qemu-system-aarch64: PCI: Bug - unimplemented PCI INTx routing (gpex-
> pcihost)"
> 
> Best Regards
> 
> Eric
> 
> Dependencies:
> The series depends on kernel series: "[PATCH 00/10] KVM PCIe/MSI
> passthrough on ARM/ARM64", (https://lkml.org/lkml/2016/1/26/371)
> 
> Git:
> QEMU:
> https://git.linaro.org/people/eric.auger/qemu.git/shortlog/refs/heads/v2.5.
> 0-pci-passthrough-rfc-v2
> 
> Kernel:
> https://git.linaro.org/people/eric.auger/linux.git/shortlog/refs/heads/v4.5-
> rc1-pcie-passthrough-v1
> 
> Testing:
> - on ARM64 AMD Overdrive HW with one e1000e PCIe card.
> 
> History:
> RFC v1 -> RFC v2:
> - now uses platform bus MMIO for mapping reserved IOVA region; hence
> the
>   new patch file:
>   "hw: platform-bus: enable to map any memory region onto the platform-
> bus"
> 
> Eric Auger (8):
>   linux-headers: partial update for VFIO reserved IOVA registration
>   Add a function to determine interrupt number for INTx routing
>   Generic PCIe host bridge INTx determination for INTx routing
>   hw: vfio: common: introduce vfio_register_reserved_iova
>   memory: add reserved_iova region type
>   hw: platform-bus: enable to map any memory region onto the
>     platform-bus
>   hw: arm: virt: register reserved IOVA region
>   hw: vfio: common: adapt vfio_listeners for reserved_iova region
> 
>  hw/arm/virt.c              | 23 ++++++++++++----
>  hw/core/platform-bus.c     | 26 +++++++++++-------
>  hw/pci-host/gpex.c         | 12 ++++++++
>  hw/vfio/common.c           | 68
> ++++++++++++++++++++++++++++++++++++----------
>  include/exec/memory.h      | 29 ++++++++++++++++++++
>  include/hw/pci-host/gpex.h |  1 +
>  include/hw/platform-bus.h  |  7 +++++
>  linux-headers/linux/vfio.h | 15 ++++++++--
>  memory.c                   | 11 ++++++++
>  9 files changed, 160 insertions(+), 32 deletions(-)
> 
> --
> 1.9.1
>