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Re: [Qemu-arm] [Qemu-devel] [PATCH v6 17/21] sdhci: add Spec v4.2 regist
From: |
Alistair Francis |
Subject: |
Re: [Qemu-arm] [Qemu-devel] [PATCH v6 17/21] sdhci: add Spec v4.2 register definitions |
Date: |
Fri, 12 Jan 2018 17:10:28 -0800 |
On Thu, Jan 11, 2018 at 12:56 PM, Philippe Mathieu-Daudé
<address@hidden> wrote:
> Signed-off-by: Philippe Mathieu-Daudé <address@hidden>
Reviewed-by: Alistair Francis <address@hidden>
Alistair
> ---
> hw/sd/sdhci-internal.h | 8 ++++++++
> 1 file changed, 8 insertions(+)
>
> diff --git a/hw/sd/sdhci-internal.h b/hw/sd/sdhci-internal.h
> index ac4704eb61..b82e847636 100644
> --- a/hw/sd/sdhci-internal.h
> +++ b/hw/sd/sdhci-internal.h
> @@ -191,6 +191,10 @@ FIELD(SDHC_HOSTCTL2, V18_ENA, 3, 1); /* UHS-I
> only */
> FIELD(SDHC_HOSTCTL2, DRIVER_STRENGTH, 4, 2); /* UHS-I only */
> FIELD(SDHC_HOSTCTL2, EXECUTE_TUNING, 6, 1); /* UHS-I only */
> FIELD(SDHC_HOSTCTL2, SAMPLING_CLKSEL, 7, 1); /* UHS-I only */
> +FIELD(SDHC_HOSTCTL2, UHS_II_ENA, 8, 1); /* since v4 */
> +FIELD(SDHC_HOSTCTL2, ADMA2_LENGTH, 10, 1); /* since v4 */
> +FIELD(SDHC_HOSTCTL2, CMD23_ENA, 11, 1); /* since v4 */
> +FIELD(SDHC_HOSTCTL2, VERSION4, 12, 1); /* since v4 */
> FIELD(SDHC_HOSTCTL2, ASYNC_INT, 14, 1);
> FIELD(SDHC_HOSTCTL2, PRESET_ENA, 15, 1);
>
> @@ -219,12 +223,16 @@ FIELD(SDHC_CAPAB, DRIVER_TYPE_C, 37, 1); /* since
> v3 */
> FIELD(SDHC_CAPAB, DRIVER_TYPE_D, 38, 1); /* since v3 */
> FIELD(SDHC_CAPAB, TIMER_RETUNNING, 40, 4); /* since v3 */
> FIELD(SDHC_CAPAB, SDR50_TUNNING, 45, 1); /* since v3 */
> +FIELD(SDHC_CAPAB, CLK_MUL, 48, 8); /* since v4.20 */
> +FIELD(SDHC_CAPAB, ADMA3, 59, 1); /* since v4.20 */
> +FIELD(SDHC_CAPAB, V18_VDD2, 60, 1); /* since v4.20 */
>
> /* HWInit Maximum Current Capabilities Register 0x0 */
> #define SDHC_MAXCURR 0x48
> FIELD(SDHC_MAXCURR, V33_VDD1, 0, 8);
> FIELD(SDHC_MAXCURR, V30_VDD1, 8, 8);
> FIELD(SDHC_MAXCURR, V18_VDD1, 16, 8);
> +FIELD(SDHC_MAXCURR, V18_VDD2, 32, 8); /* since v4.20 */
>
> /* W Force Event Auto CMD12 Error Interrupt Register 0x0000 */
> #define SDHC_FEAER 0x50
> --
> 2.15.1
>
>
- Re: [Qemu-arm] [Qemu-devel] [PATCH v6 10/21] hw/arm/exynos4210: implement SDHCI Spec v2, (continued)
- [Qemu-arm] [PATCH v6 11/21] hw/arm/xilinx_zynq: implement SDHCI Spec v2, Philippe Mathieu-Daudé, 2018/01/11
- [Qemu-arm] [PATCH v6 12/21] hw/arm/bcm2835_peripherals: implement SDHCI Spec v3, Philippe Mathieu-Daudé, 2018/01/11
- [Qemu-arm] [PATCH v6 13/21] hw/arm/bcm2835_peripherals: change maximum block size to 1kB, Philippe Mathieu-Daudé, 2018/01/11
- [Qemu-arm] [PATCH v6 14/21] hw/arm/fsl-imx6: implement SDHCI Spec v3, Philippe Mathieu-Daudé, 2018/01/11
- [Qemu-arm] [PATCH v6 15/21] hw/arm/xilinx_zynqmp: implement SDHCI Spec v3, Philippe Mathieu-Daudé, 2018/01/11
- [Qemu-arm] [PATCH v6 16/21] sdhci: remove the deprecated 'capareg' property, Philippe Mathieu-Daudé, 2018/01/11
- [Qemu-arm] [PATCH v6 17/21] sdhci: add Spec v4.2 register definitions, Philippe Mathieu-Daudé, 2018/01/11
- Re: [Qemu-arm] [Qemu-devel] [PATCH v6 17/21] sdhci: add Spec v4.2 register definitions,
Alistair Francis <=
- [Qemu-arm] [PATCH v6 18/21] sdhci: implement the Host Control 2 register for the tunning sequence, Philippe Mathieu-Daudé, 2018/01/11
- [Qemu-arm] [PATCH v6 19/21] sdbus: add trace events, Philippe Mathieu-Daudé, 2018/01/11
- [Qemu-arm] [PATCH v6 20/21] sdhci: implement UHS-I voltage switch, Philippe Mathieu-Daudé, 2018/01/11
- [Qemu-arm] [PATCH v6 21/21] sdhci: implement CMD/DAT[] fields in the Present State register, Philippe Mathieu-Daudé, 2018/01/11